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PDF SI9978 Data sheet ( Hoja de datos )

Número de pieza SI9978
Descripción Configurable H-Bridge Driver
Fabricantes Vishay Siliconix 
Logotipo Vishay Siliconix Logotipo



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No Preview Available ! SI9978 Hoja de datos, Descripción, Manual

Configurable H-Bridge Driver
Si9978DW
Vishay Siliconix
Si9978
FEATURES
• H-Bridge or Dual Half-Bridge Operation • Cross-Conduction Protected
• 20- to 40-V Supply
• Current Limit
• Static (dc) Operation
• Undervoltage Lockout
• ESD Protected
• Fault Output
DESCRIPTION
The Si9978DW is an integrated driver for an n-channel
MOSFET H-bridge. The mode control allows operation as
either a full H-bridge driver or as two independent
half-bridges. The DIR/PWM input configuration allows easy
implementation of either sign/magnitude or anti-phase PWM
drive schemes for full H-bridges. Schmitt triggers on the
inputs provide logic signal compatibility and hysteresis for
increased noise immunity. An internal low-voltage regulator
allows the device to be powered directly from a system supply
of 20 to 40 volts. All n-channel gates are driven directly from
low-impedance outputs. The addition of one external
capacitor per half-bridge allows internal circuitry to level shift
both the power supply and logic signal for the high-side
n-channel gate drives. Internal charge pumps replace leakage
current lost in the high-side driver circuits to provide “static”
(dc) operation in any output condition. Protection features
include an undervoltage lockout, cross-conduction prevention
logic, and overcurrent monitors.
The Si9978DW is available in the 24-pin wide-body SOIC
(surface mount) package, specified to operate over the
industrial (-40 to +85°C) temperature range.
FUNCTIONAL BLOCK DIAGRAM
FaxBack 408-970-5600, request 70011
www.siliconix.com
S-60752—Rev. D, 05-Apr-99
1

1 page




SI9978 pdf
Si9978DW
Vishay Siliconix
Pin 8: CL/FAULTB
This is an open drain output which is active low. When the
MODE pin is at logic “1”, this pin functions as CL and
indicates that the H-bridge is in current limit. It stays low for
the duration of the current limit one-shot. With the MODE pin
at logic “0”, it serves as the FAULT output for half-bridge B to
indicate when an undervoltage or overcurrent condition is
detected. When indicating an overcurrent condition, the output
stays low for the duration of the current limit one-shot. The
FAULT output resets automatically when the condition clears.
comparators. Externally they are connected to the source(s)
of the low-side MOSFET(s) and the current sense resistor.
Pin 15: GND
The GND pin is the ground return for V+ and the ground
reference for the logic. Also, this is the ground reference input
for the current limit comparators and is connected to the
ground side of the internal 100-mV references. This pin
should be connected directly to the ground side of the current
sensing resistors.
Pin 9: FAULT/FAULTA
This is an open drain output which is switched low when an
undervoltage or overcurrent condition is detected. When
indicating an overcurrent condition, the output stays low for
the duration of the current limit one-shot. When the MODE
pin is at logic “1”, this pin is the H-bridge FAULT output. With
the MODE pin at logic “0”, it serves as the FAULT output for
half-bridge A. The FAULT output resets automatically when
the condition clears.
Pin 10: NC
No internal connection.
Pin 16: GBB and Pin 20, GBA
These pins drive the gates of the low-side power MOSFETs.
Pin 17: GTB and Pin 21, GTA
These pins drive the gates of the high-side power MOSFETs.
Pin 18: SB and Pin 22, SA
These are the source connections of the high-side power
MOSFETs, the drain of the external low-side power MOSFET,
the negative terminal of the bootstrap capacitor, and the
output for each half-bridge.
Pin 11: RA/CA
The timing resistor and capacitor for the current limit one-shot
are connected to this pin. The values of the resistor and
capacitor determine the off time set by the one-shot. The
one-shot is triggered when the current limit comparator
detects an overcurrent condition.
Pin 12: RB/CB
The timing resistor and capacitor for the current limit one-shot
are connected to this pin. The values of the resistor and
capacitor determine the off time set by the one-shot. The
one-shot is triggered when the current limit comparator
detects an overcurrent condition.
Pin 13: ILA+ and Pin 14, ILB+
These are the overcurrent sense inputs. Internally, they are
connected to the noninverting inputs of the current limit
Pin 19: CAPB and Pin 23, CAPA
These are the connections for the positive terminals of the
bootstrap capacitors CBA and CBB. A 0.01-µF capacitor can
be used for most applications.
Pin 24: V+
This is the only external power supply required for the
Si9978DW, and must be the same supply used to power the
H-bridge it is driving. The Si9978DW powers the low-voltage
logic, low-side gate driver, and bootstrap/ charge pump
circuits from self-contained voltage regulators which require
only a bootstrap capacitor on the CAP pins.
No voltage sensing circuitry monitors V+ directly; however, the
low-voltage, internally generated supply and the bootstrap
voltage (which are derived from V+) are directly protected by
undervoltage monitors.
FaxBack 408-970-5600, request 70011
www.siliconix.com
S-60752—Rev. D, 05-Apr-99
5

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