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PDF SI8401DB-T1 Data sheet ( Hoja de datos )
| Número de pieza | SI8401DB-T1 | |
| Descripción | P-Channel 20-V (D-S) MOSFET | |
| Fabricantes | Vishay Siliconix | |
| Logotipo |  |
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P-Channel 20-V (D-S) MOSFET
Si8401DB
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
rDS(on) (W)
−20 0.065 @ VGS = −4.5 V
0.095 @ VGS = −2.5 V
MICRO FOOT
Bump Side View
Backside View
3
D
2
D
8401
xxx
S
4
G
1
Ordering Information: Si8401DB-T1
Si8401DB-T1—E3 (Lead Free)
ID (A)
−4.9
−4.1
FEATURES
D TrenchFETr Power MOSFET
D New MICRO FOOTr Chipscale Packaging
Reduces Footprint Area Profile (0.62 mm) and
On-Resistance Per Footprint Area
D Pin Compatible to Industry Standard Si3443DV
APPLICATIONS
D PA, Battery and Load Switch
D Battery Charger Switch
D PA Switch
S
Device Marking: 8401
xxx = Date/Lot Traceability Code
G
D
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED)
Parameter
Symbol
5 secs Steady State
Drain-Source Voltage
Gate-Source Voltage
VDS −20
VGS "12
Continuous Drain Current (TJ = 150_C)a
Pulsed Drain Current
continuous Source Current (Diode Conduction)a
Maximum Power Dissipationa
Operating Junction and Storage Temperature Range
Package Reflow Conditionsb
TA = 25_C
TA = 70_C
TA = 25_C
TA = 70_C
VPR
IR/Convection
ID
IDM
IS
PD
TJ, Tstg
−4.9
−3.6
−3.9
−2.8
−10
−2.5
−2.5
2.77
1.47
1.77
0.94
−55 to 150
215/245c
220/250c
Unit
V
A
W
_C
_C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambienta
Maximum Junction-to-Foot (drain)
t v 5 sec
Steady State
Steady State
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
b. Refer to IPC/JEDEC (J-STD-020A), no manual or hand soldering.
c. Package reflow conditions for lead-free.
Document Number: 71674
S-40384—Rev. F, 01-Mar-04
Symbol
RthJA
RthJF
Typical
35
72
16
Maximum
45
85
20
Unit
_C/W
www.vishay.com
1
1 page  
PACKAGE OUTLINE
MICRO FOOT: 4-BUMP (2 X 2, 0.8-mm PITCH)
4 O 0.30 X 0.31
Note 3
Solder Mask O X 0.40
e
e
Recommended Land
A2
A
A1
b Diamerter
8401
XXX
E
Mark on Backside of Die
NOTES (Unless Otherwise Specified):
1. Laser mark on the silicon die back, coated with a thin metal.
2. Bumps are Eutectic solder 63/57 Sn/Pb. (Sn 3.8 Ag, 0.7 Cu for Pb-free bumps)
3. Non-solder mask defined copper landing pad.
4. The flat side of wafers is oriented at the bottom.
Si8401DB
Vishay Siliconix
Silicon
Bump Note 2
S
e
eS
D
Document Number: 71674
S-40384—Rev. F, 01-Mar-04
Dim
A
A1
A2
b
D
E
e
S
MILLIMETERS*
Min Max
0.600
0.650
0.260
0.290
0.340
0.360
0.370
0.410
1.520
1.600
1.520
1.600
0.750
0.850
0.370
0.380
INCHES
Min Max
0.0236
0.0256
0.0102
0.0114
0.0134
0.0142
0.0146
0.0161
0.0598
0.0630
0.0598
0.0630
0.0295
0.0335
0.0146
0.0150
* Use millimeters as the primary measurement.
www.vishay.com
5
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| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet SI8401DB-T1.PDF ] | |
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