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PDF ISL6121 Data sheet ( Hoja de datos )
| Número de pieza | ISL6121 | |
| Descripción | Single Supply Integrated Current Limiting Controller | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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TM
Data Sheet
ISL6121
May 2001
File Number 9004.1
Single Supply Integrated Current Limiting
Controller
The ISL6121 is a single supply Overcurrent (OC) fault
protection IC for 2.5V to 5V applications where 2A current
limiting is desired. This device features internal current
monitoring and limiting along with a 50mΩ integrated power
switch and a current limited time out to latch-off feature for
system protection. The time to latch-off is independent of
device temperature, and magnitude of OC.
Each ISL6121 incorporates in a 8 lead SOIC package a
50mΩ N-channel MOSFET power switch for power control.
The switch is driven by a constant current source giving a
controlled ramp up of the output voltage. This provides a soft
start turn-on eliminating bus voltage drooping caused by in-
rush current while charging heavy load capacitances.
(Enable high (ISL6121H) and enable low (ISL6121L) options
are) available with a fault reporting output compatible with 3V
and 5V logic level signals allowing for external control and
monitoring.
The Under Voltage (UVLO) lockout feature prevents turn-on
of the output unless the correct ENABLE signal and VIN >
2.5V are both present. During initial turn-on the ISL6121
design prevents a fault from being presented by blanking the
fault signal, unlike other vendor devices needing additional
external circuitry to accomplish this. Rising and falling
output is a current-limited voltage ramp so that both the
inrush current and voltage slew rate are limited,
independent of load. This reduces supply droop due to
surge and eliminates the need for external EMI filters.
During operation once an OC condition is detected the
output is current limited to 2A to allow for a transient
condition to pass. If still in current limit after the current limit
period has elapsed the output is latched off and the fault is
reported by pulling the FAULT low. The FAULT signal is
latched low until reset by the enable signal being deasserted
at which time the FAULT signal will clear.
See Figure 1 for typical application configuration.
Ordering Information
PART
NUMBER
ISL6121HIB
ISL6121HIB-T
TEMP. RANGE
(oC) PACKAGE PKG. NO.
-40 to 85 8 Ld SOIC M8.15
-40 to 85 8 Ld SOIC Tape and Reel
ISL6121LIB
ISL6121LIB-T
ISL6121HEVAL1
-40 to 85 8 Ld SOIC M8.15
-40 to 85 8 Ld SOIC Tape and Reel
Evaluation Platform
Features
• 0.05Ω Integrated Power N-channel MOSFET Switch
• Accurate Current Sensing and Limiting
• 12ms Timed Fault Latch-Off, No thermal Dependency
• 2.5V to 5.5V Operating Range
• Under Voltage Lockout
• Disabled Output Internally Pulled Low
• Controlled Turn On/Off Ramp Times
• Fault Output Signal
• Logic Level Enable High Inputs (ISL6121H) or Enable Low
Inputs (ISL6121L)
• Logic Level Compatible Enable Input and Fault Output
Applications
• Fibre Channel
• Industrial Power Control
• Hot Plug
1 GND
2 VIN
3 VIN
4 EN
OUT 8
OUT 7
OUT 6
FAULT 5
RL
CL
FIGURE 1. ISL6121 TYPICAL APPLICATION
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, All Rights Reserved
1 page  
ISL6121
Typical Performance Curves
ON
OFF
ENABLE
FAULT
LATCH-OFF SET
RESET BY
ENABLE
VOUT
CURRENT
REGULATION
SETTLING
TIME (1.4ms)
OVER CURRENT
IOUT
2A CURRENT
LIMIT
12ms CURRENT REGULATION PERIOD
FIGURE 2. OPERATIONAL WAVEFORMS
75
70
65 VIN = 2.7V
60
55 VIN = 5V
50
45 VIN = 3.3V
40
35
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100
TEMPERATURE (oC)
FIGURE 3. SWITCH RESISTANCEAT 1A
ENABLE
CL = 0.1µF, 10µF
VOUT
CL = 100µF
VOUT (1V/DIV.)
TIME (200µs/DIV.)
FIGURE 4. VOUT SOFT START vs CLOAD
2400
2200
2000
1800
-40oC
25oC
85oC
1600
1.3 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.8
VOUT (V)
FIGURE 6. CURRENT REGULATION vs VOUT (VIN = 5.0V)
5
2400
2200
-40oC
2000
25oC
1800
85oC
1600
1.25 1.5
1.75 2.0 2.25 2.5
VOUT (V)
2.75 3.0
3.1
FIGURE 5. CURRENT REGULATION vs VOUT (VIN = 3.3V)
CURRENT REGULATED
LEVEL
NOMINAL CURRENT
TIME (200µs /DIV.)
FIGURE 7. OC TO CR SETTLING TIME WAVEFORMS
5 Page 
ISL6121
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
e A1
B
0.25(0.010) M C A M B S
µα
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0532 0.0688 1.35
1.75
-
A1
0.0040 0.0098 0.10
0.25
-
B
0.013 0.020 0.33
0.51
9
C
0.0075 0.0098 0.19
0.25
-
D
0.1890 0.1968 4.80
5.00
3
E
0.1497 0.1574 3.80
4.00
4
e 0.050 BSC 1.27 BSC -
H
0.2284 0.2440 5.80
6.20
-
h
0.0099 0.0196 0.25
0.50
5
L
0.016 0.050 0.40
1.27
6
N8
87
α 0o 8o 0o 8o -
Rev. 0 12/93
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at website www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. How-
ever, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web sit ewww.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
2401 Palm Bay Road
Palm Bay, FL 32905
TEL: (321) 724-7000
FAX: (321) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil Ltd.
8F-2, 96, Sec. 1, Chien-kuo North,
Taipei, Taiwan 104
Republic of China
TEL: 886-2-2515-8508
FAX: 886-2-2515-8369
11
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| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ISL6121.PDF ] | |
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