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PDF ISL5585 Data sheet ( Hoja de datos )
| Número de pieza | ISL5585 | |
| Descripción | 3.3V Ringing SLIC Family for Voice Over Broadband VOB | |
| Fabricantes | Intersil Corporation | |
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ISL5585
®
Data Sheet
October 2003
FN6026.4
3.3V Ringing SLIC Family for Voice Over
Broadband (VOB)
The 3.3V family of ringing subscriber line interface circuits
(SLIC) supports analog Plain Old Telephone Service
(POTS) in short and medium loop length, wireless and
wireline voice over broadband applications. Ideally suited for
customer premise equipment, this family of products offers
flexibility to designers with high ringing voltage and low
power consumption system requirements.
The ISL5585 family is capable of operating with 100V ringing
battery supply, which translates directly to the amount of
ringing voltage supplied to the subscriber. With the high
operating voltage, subscriber loop lengths can be extended
to 500Ω (i.e., 5,000 feet) and beyond, allowing this family to
serve emerging Fiber In The Loop (FITL) markets.
Other key features across the product family include: 3.3V
VCC operation, low power consumption, ringing using
sinusoidal or trapezoidal waveforms, robust auto-detection
mechanisms for when subscribers go on or off hook, and
minimal external discrete application components.
Integrated test access features are also offered on selected
products to support loopback testing as well as line
measurement tests.
There are ten product offerings of the ISL5585 providing
various grades of ringing battery voltage and longitudinal
balance.
Block Diagram
POL CDC
VBL VBH
ILIM
DC
CONTROL
BATTERY
SWITCH
RINGING
PORT
VRS
TIP
RING
TL
2-WIRE
PORT
TRANSIENT
CURRENT
LIMIT
SW+
SW-
TEST
ACCESS
TRANSMIT
SENSING
4-WIRE
PORT
AUX
VTX
-IN
VFB
DETECTOR
LOGIC
CONTROL
LOGIC
F2
F1
F0
RT SH E0 DET ALM BSEL SWC
Features
• 3.3V Operation
• Onboard Ringing Generation
• Low Standby Power Consumption (75V, 65mW)
• Programmable Transient Current Limit
• Improved Off Hook Software Interface
• Integrated MTU DC Characteristics
• Low External Component Count
• Silent Polarity Reversal
• Pulse Metering and On Hook Transmission
• Tip Open Ground Start Operation
• Balanced and Unbalanced Ringing
• Thermal Shutdown with Alarm Indicator
• 28 Lead Surface Mount Packaging
• Reduced Footprint Quad Flatpack No-lead (QFN)
Packaging
Applications
• Short Loop Access Platforms
• Voice Over Internet Protocol (VoIP)
• Voice Over Cable and DSL Modems
• Internet Protocol PBX
• FiberTo The Home (FTTH)
• Remote Subscriber Units
• Ethernet Terminal Adapters
Related Literature
• AN1038, User’s Guide for Development Board
• AN9824, Modeling of the AC Loop
• TB379 Thermal Characterization of Packages for ICs
• AN9922, Thermal Characterization and Modeling of the
RSLIC18 in the Micro Leadframe Package
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL5585
Electrical Specifications
Unless Otherwise Specified, TA = -40oC to 85oC for industrial (I) grade and TA = 0oC to 85oC for commercial
(C) grade, VBL = -24V, VBH = -100V, -85V or -75V, VCC = +3.3V, AGND = BGND = 0V, loop current limit =
25mA. All AC transmission parameters are specified at 600W 2-wire terminating impedance over the frequency
band of 300Hz to 3.4kHz. Protection resistors = 0W. (Continued)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNITS
2-Wire Return Loss
300Hz
- 24 - dB
1kHz
- 40 - dB
3.4kHz
- 21 - dB
2-Wire Longitudinal Balance (Notes 5, 6)
300Hz to 1kHz
Forward Active, Grade A and B
Forward Active, Grade C, D and E
58 62 - dB
53 59 - dB
2-Wire Longitudinal Balance (Notes 5, 6)
1kHz to 3.4kHz
Forward Active, Grade A and B
Forward Active, Grade C, D and E
54 58 - dB
53 58 - dB
4-Wire Longitudinal Balance (Notes 5, 6)
300Hz to 1kHz
Forward Active, Grade A and B
Forward Active, Grade C, D and E
58 67 - dB
53 64 - dB
4-Wire Longitudinal Balance (Notes 5, 6)
1kHz to 3.4kHz
Forward Active, Grade A and B
Forward Active, Grade C, D and E
54 66 - dB
53 63 - dB
2-Wire to 4-Wire Level Linearity
4-Wire to 2-Wire Level Linearity
Referenced to -10dBm
+3 to -40dBm, 1kHz
-40 to -50dBm, 1kHz
-50 to -55dBm, 1kHz
- ±0.025 -
- ±0.050 -
- ±0.100 -
dB
dB
dB
Longitudinal Current Capability Per Wire
(Note 3)
OHT, Active
20 -
- mARMS
4-Wire to 2-Wire Insertion Loss
-0.20 0.00 +0.20
dB
2-Wire to 4-Wire Insertion Loss
-6.22 -6.02 -5.82
dB
4-Wire to 4-Wire Insertion Loss
Forward Active Idle Channel Noise (Note 6) 2-Wire C-Message, T=25oC
4-Wire C-Message, T=25oC
Reverse Active Idle Channel Noise (Note 6) 2-Wire C-Message, T=25oC
4-Wire C-Message, T=25oC
-6.22
-
-
-
-
-6.02
10
4
10
4
-5.82
13
7
13
7
dB
dBrnC
dBrnC
dBrnC
dBrnC
DC PARAMETERS
Off Hook Loop Current Limit
Programming Accuracy(1% programming resistor)
-8.5
-
+8.5
%
Programming Range
15 - 45 mA
Off Hook Transient Current Limit
Programming Accuracy (1% programming resistor)
-20 - +20 %
Programming Range
40 - 100 mA
Loop Current During Low Power Standby Forward Polarity Only
18 - 26 mA
Open Circuit Voltage (|Tip - Ring|)
Low Power Standby, Open Circuit Voltage
(Tip - Ring)
Absolute Open Circuit Voltage
TEST ACCESS FUNCTIONS
VBL=-16V
VBL=-24V
VBH > -60V
VBL=-48V
VBH > -60V
VRG in LPS and FA; VTG in RA; VBH > -60V
- 8.0 - VDC
14 15.5 17 VDC
43 49
- VDC
- 44.5 - VDC
43 51.5 - VDC
- -53 -56 VDC
Switch On Voltage
Loopback Max Battery (VBL or VBH)
IOL=45mA
-
0.20 0.60
V
- - 52 V
5
5 Page 
ISL5585
Complex Impedance Synthesis
Substituting the impedance programming resistor, RS, with a
complex programming network provides complex
impedance synthesis.
2-WIRE
NETWORK
C2
PROGRAMMING
NETWORK
CParallel
R1
R2
RSeries
RParallel
FIGURE 5. COMPLEX PROGRAMMING NETWORK
The reference designators in the programming network
match the evaluation board. The component RS has a
different design equation than the RS used for resistive
impedance synthesis. The design equations for each
component are provided below.
RSeries = 133.3 × (R1 – 2(RP))
RParallel = 133.3 × R2
CParallel = C2 ⁄ 1· 33.3
(EQ. 22)
(EQ. 23)
(EQ. 24)
Node Equation at ISL5585 AUX input, Figure 4
IX
=
A-----U-----X--
R
+
-V----T---X--
R
(EQ. 25)
Substituting EQ 17 for VTX with AUX =0 and ∆IM= -V2W/ZL
gives us EQ 26. Note: AUX input is not used.
Substitute EQ 17 into EQ 21
IX
=
-V----T---X--
R
=
–-V----I--N--
R
R--R---I-S-N--
–
V-----2-Z--w--L--3----0-
R--R---8--S--k--
(EQ. 26)
Loop Equation at ISL5585 feed amplifiers and load.
(EQ. 27)
IXR - VTR + IXR = 0
Substitute EQ 26 into EQ 27
VTR
=
–
2
V
I
N
R--R---I-S-N--
+
2----V----Z-2---wL----3---0--
R-8----kS--
(EQ. 28)
Substitute Equation 19 for RS/8k in Equation 28.
VTR
=
–
2
VIN
R--R---I-S-N--
+
2----V----Z-2---wL----3---0--
-1---3---3---.-8-3--k-3----Z----O---
(EQ. 29)
Simplifying
VTR
=
–
2VI
N
R--R---I-S-N--
+
V---Z--2--L-w--
(
ZO
)
(EQ. 30)
Loop Equation at Tip/Ring interface
(EQ. 31)
V2W -IM2RP + VTR = 0
Substitute Equation 30 into Equation 31 and combine terms
V2W
Z----L-----+-----Z----O-----+-----2---R-----P--
ZL
=
2VI
N
--R----S---
RIN
(EQ. 32)
where:
VIN = The input voltage at the -IN pinthrough resistor RIN.
AUX = Auxiliary input of SLIC. Not used for AC gains.
VSA = An internal node voltage that is a function of the loop
current and the output of the Sense Amplifier.
IX = Internal current in the SLIC that is the difference between
the input receive current and the feedback current.
IM = The AC metallic current.
RP = A protection resistor (typical 49.9Ω).
RS = An external resistor/network for matching the line
impedance.
VTR = The tip to ring voltage at the output pins of the SLIC.
V2W = The tip to ring voltage including the voltage across the
protection resistors.
ZL = The line impedance.
ZO = The source impedance of the device.
4-Wire to 2-Wire Gain
4-wire to 2-wire gain across the ISL5585 is equal to the V2W
divided by the input voltage VIN, reference Figure 4. The
receive gain is calculated using Equation 32.
Equation 33 expresses the receive gain (VIN to V2W) in
terms of network impedances. From Equation 21, the value
of RS was set to match the line impedance (ZL) to the
ISL5585 plus the protection resistors (Z0 + 2RP). This
results in a 4-wire to 2-wire gain equal to RS/RIN, as shown
in EQ. 33.
G4-2
=
V-----2---W---
VIN
=
2
R--R---I-S-N--
Z----L-----+-----Z---Z-O---L---+------2---R----P--
=
2 -Z---L---Z--+--L---Z----L-
=
--R----S---
RIN
(EQ. 33)
2-Wire to 4-Wire Gain
The 2-wire to 4-wire gain is equal to VTX/EG with VIN = 0,
reference Figure 4.
Loop Equation
–EG + ZLIM + 2RPIM – VTR = 0
(EQ. 34)
From Equation 30 with VIN = 0
VTR
=
Z----O-----V----2----W---
ZL
(EQ. 35)
Substituting Equation 35 into Equation 34 and simplify.
EG
=
–V2W
Z----L-----+-----2----R----P-----+-----Z----O--
ZL
(EQ. 36)
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet ISL5585.PDF ] | |
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