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PDF ISL6560 Data sheet ( Hoja de datos )
| Número de pieza | ISL6560 | |
| Descripción | Microprocessor CORE Voltage Regulator Two-Phase Buck PWM Controller | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
February 2003
ISL6560
FN9011.2
Microprocessor CORE Voltage Regulator
Two-Phase Buck PWM Controller
The ISL6560 two-phase current mode, PWM control IC
together with companion gate drivers, the HIP6601A,
HIP6602A, HIP6603A or HIP6604 and MOSFETs provides a
precision voltage regulation system for advanced
microprocessors. Two-phase power conversion is a marked
departure from earlier single phase converter configurations
previously employed to satisfy the ever increasing current
demands of modern microprocessors. Multi-phase
converters, by distributing the power and load current,
results in smaller and lower cost transistors with fewer input
and output capacitors. These reductions accrue from the
higher effective conversion frequency with higher frequency
ripple current due to the phase interleaving process of this
topology. For example, a two phase converter operating at
350kHz per phase will have a ripple frequency of 700kHz.
Higher converter bandwidth is also achievable, resulting in
faster response to load transients.
An outstanding feature of this controller IC includes high-
side current sensing with a single current sampling resistor
in the input line to the output MOSFET transistors. This
single current sampling resistor monitors each channels
input current assuring excellent current sharing. Current
mode control results in rapid response to changing load
demands.
Also featured are programmable VID codes with an
accuracy of ±0.8% that range from 1.100–1.850V, and are
set by the microprocessor. Pull up currents on these VID
pins eliminates the need for external pull-up resistors.
Another feature of this controller IC is the PWRGD monitor
circuit and load protection circuits which provide overvoltage
protection, overcurrent protection and undervoltage
indication.
Features
• Two-phase power conversion
• Precision channel current sharing
• Precision CORE voltage regulation
- ±0.8% accuracy
• Microprocessor voltage identification input
- VRM 9.0 compliant
- 5-bit VID input
- 1.100 to 1.850V in 25mV steps
- Programmable “droop” voltage
• Fast transient recovery time
• Overcurrent protection
• High output ripple frequency. . . . . . . . . . . . . 100kHz to 2MHz
Applications
• VRM9.X modules
• AMD Athlon™ processor voltage regulator
• Low output voltage, high current DC/DC converters
Related Literature
• Technical Brief TB363 Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)
Ordering Information
PART NUMBER TEMP. (oC) PACKAGE PKG. NO.
ISL6560CB
0 to 70 16 Ld SOIC M16.15
ISL6560CB-T
16 Ld SOIC Tape and Reel
ISL6560/62EVAL1 Evaluation Platform
Pinout
ISL6560 (SOIC)
TOP VIEW
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
CT 8
16 VCC
15 REF
14 CS-
13 PWM1
12 PWM2
11 CS+
10 PWRGD
9 GND
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Athlon™ is a trademark of Advanced Micro Devices, Inc. | Copyright © Intersil Americas Inc. 2003, All Rights Reserved
1 page  
ISL6560
General Circuit Description
RSENSE
INPUT
VOLTAGE
CS+
CS-
+Current -
Comparator
ISL6560
OUTPUT
GATE
DRIVERS
and
Logic
RESET
SET
OSCILLATOR
GATE DRIVER
and
OUTPUT FETs
PWM1
GATE DRIVER
and
OUTPUT FETs
PWM2
CT
+
VCORE
COMP
RL
REF
gm -
Error
Amplifier
+
Reference
Voltage
FB
VID4
VID3
D/A VID2
VID1
VID0
GND
FIGURE 1. FUNCTIONAL SYSTEM BLOCK DIAGRAM SHOWING MAJOR COMPONENTS
The ISL6560 is a two-power channel, current mode PWM
controller with input current sensing. A transconductance
error amplifier helps establish the desired droop voltage for
microprocessor power supplies and will be explained later.
Figure 1 is a functional system block diagram of the IC in a
power supply application. A single current sampling resistor,
RSENSE, on the input side of the supply monitors the current
for both channels via a comparator within the ISL6560. A
single comparator insures that both channels are monitored
by the same circuitry, helping to balance the operating
current of each channel. During normal operation the
comparator is tripped by the peak inductor current,
terminating the conduction cycle. As more current is needed
to supply the output load, the comparator threshold voltage
is increased, increasing the inductor current to
accommodate the increased load demands.
by the amplifier attempting to make both inputs equal. This
does not happen because of the limited loop gain and
provides the bases for droop compensation mentioned
earlier and described below.
3.0
2.5
2.0 12.5V/V
1.5
1.0
{
0.5
Output
Disable
Threshold
0
0
20 40
60 80 100 120 140 160
VCS(CL) (mV)
Circuit Operation
Figure 1 will be used to describes operation of the controller.
A transconductance error amplifier provides the major
voltage control function. The error amplifier’s positive input is
connected to an internal DAC that is programmed via a 5-bit
code from the microprocessor. Regulation is accomplished
FIGURE 2. CURRENT COMPARATOR THRESHOLD
VOLTAGE AS A FUNCTION OF VCOMP
Figure 2 shows a curve of the current comparator threshold
voltage as a function of the error amplifier output voltage,
VCOMP. From this curve, it can be seen that as VCOMP
5
5 Page 
ISL6560
2. Current sense is critical, especially at lower current levels
where the current comparator threshold voltage is lower.
A good Kelvin connection requires that the voltage
sample must be taken at the RSENSE resistor ends, and
not at the planes to which the resistor is connected.
3. The lines to the current sense resistor should be parallel
and run away from the PHASE or PWM signals to prevent
coupling of spikes to the current comparator input that
may delay or advance triggering of the comparator.
Parallel routing will work towards equal exposure for both
lines, so that the comparator common mode rejection
characteristic will reduce the influence of coupled noise.
4. Place the current sense filter network near the controller.
This will help reduce extraneous inputs to the
comparator.
5. Make sure the DC plus pulse voltage inputs to the current
sense comparator, CS+ and CS-, do not exceed the
voltage on the VCC pin by more than the specified limit of
VCC + 0.3V.
Voltage Sampling
1. To obtain optimum regulation use the Kelvin connection
for the input voltage sample as shown in Figure 11. The
ground connection, Pin 9 of the ISL6560 should be
connected to the system ground at the load.
2. The two voltage sampling lines described in item 1 above
should also be routed away from any high-current or
high- pulse voltages such as the phase lines or pads.
Doing this will reduce the possibility of coupling undesired
pulses into the feedback signal and either modifying the
output of the error amplifier or, if of sufficient amplitude,
spuriously triggering the current comparator by
readjusting the threshold voltage.
Other Considerations
1. Keep the leads to the timing capacitor connected to pin
CT short and return the ground directly to Pin 9.
2. When using a transistor to disable the converter by
pulling the CT pin to ground, place the transistor close to
the CT pin to minimize extraneous signal pickup.
3. As in all designs, keep decoupling networks near the pins
that must be decoupled. For example, the
decoupling/filter network on the FB input. The series
resistor should be located next to the FB pin.
4. Large power and ground planes are critical to keeping
performance and efficiency high. Consider a 1mΩ
resistance in a 40A supply line. With 1.8V output, this
results in slightly over 2% power loss in the 72W supply.
12V
+VIN
Keep Leads Together
& Away from Output
Place Near Drains of the
Output Transistors
1 VID4
Input
VID Codes
from
Processor {{
2 VID3
3 VID2
4 VID1
VCC 16
REF 15
CS- 14
PWM1 13
5 VID0 PWM2 12
6 COMP CS+ 11
7 FB PWRGD 10
8 CT
GND 9
ISL6560
Locate
Parts
Next to IC
Locate
Parts
Next
to IC
1 UGATE PHASE 8
2 BOOT PVCC 7
3 PWM
VCC 6
4 GND LGATE 5
HIP6601ECB
Try to return bypass
capacitors to ground
of lower MOSFETs
+VCORE
FIGURE 11. SCHEMATIC DIAGRAM SHOWING ONLY ONE CHANNEL OF ‘IDEAL’ COMPONENT PLACEMENT
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet ISL6560.PDF ] | |
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