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PDF DSP201KP Data sheet ( Hoja de datos )
| Número de pieza | DSP201KP | |
| Descripción | DSP-Compatible Single/Dual DIGITAL-TO-ANALOG CONVERTERS | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DSP201KP (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
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® DSP201
DSP202
DSP-Compatible Single/Dual
DIGITAL-TO-ANALOG CONVERTERS
FEATURES
q ZERO-CHIP INTERFACE TO DSP ICs:
AD, AT&T, MOTOROLA, TI
q SINGLE CHANNEL: DSP201
q DUAL CHANNEL: DSP202
Two Serial Inputs or Cascade from Single
32-Bit Word
q UPDATE RATE TO 500kHz
q DYNAMIC SPECIFICATIONS:
Signal/(Noise + Distortion) = 90dB;
THD = –92dB
q USER SELECTABLE 16-BIT OR 18-BIT
DATA WORDS
Convert Command
DESCRIPTION
The DSP201 and DSP202 are high performance digi-
tal-to-analog converters designed for simplicity of use
with modern digital signal processing ICs. Both are
complete with all interface logic for use directly with
DSP ICs, and provide analog output voltages updated
at up to 500kHz.
The DSP201 offers a single complete voltage output
channel, accepting either 16 bits or 18 bits of input
data, and can be driven by 16-bit, 24-bit, or 32-bit
serial ports. The DSP202 offers two complete voltage
output channels, with either two separate input ports,
or a mode to drive both output channels from a single
32-bit word.
Both the DSP201 and DSP202 are packaged in stan-
dard, low-cost 28-pin plastic DIP packages. Each is
offered in two performance grades to match applica-
tion requirements.
Latch Enable
Reset
Select Sync Format
Select Word Length (16/18)
Channel A Data In
Sync
Bit Clock
Channel B Data In
Cascade
Control
Logic
18-Bit DAC
Reference
Analog Voltage
Output
Channel A
18-Bit DAC
Channel B on DSP202 Only
Analog Voltage
Output
Channel B
International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1991 Burr-Brown Corporation
PDS-1067C
Printed in U.S.A. July, 1993
1 page  
DSP201 PIN CONFIGURATION
VA – 1
2
3
AGND 4
5
VD+
VD+
RESET
6
7
8
SSF 9
SWL 10
SYNC 11
XCLK 12
SIN 13
14
DSP201
28 AGND
27 DGND
26 VA +
25 VPOT
24 MSB
23 VOS
22 AGND
21 VOUT
20 VD–
19 DGND
18 DGND
17 ENABLE
16 DGND
15 CONV
DSP201 PIN ASSIGNMENTS
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NAME
VA–
AGND
VD+
VD+
RESET
SSF
SWL
SYNC
XCLK
SIN
CONV
DGND
ENABLE
DGND
DGND
VD–
VOUT
AGND
VOS
MSB
VPOT
VA+
DGND
AGND
DESCRIPTION
–5V Analog Power.
No Internal Connection.
No Internal Connection.
Analog Ground.
No Internal Connection.
+5V Digital Power.
+5V Digital Power.
Reset. If LOW, DAC output will be 0V after two
convert commands, and will remain there as long
as the Reset input is LOW. If HIGH, normal
operation proceeds. Two convert commands are
required after Reset goes from LOW to HIGH
before the output will relate to the input word.
Select Sync Format In. Tie HIGH for use with
Motorola and TI DSP ICs. Tie LOW for use with
AT&T DSP ICs.
Select Word Length In. If HIGH, DSP201 accepts
first 16 bits of data. If LOW, DSP201 accepts first
18 bits of data.
Data Synchronization Output. Active HIGH when
SSF is HIGH, active LOW when SSF is LOW.
Data Transfer Clock Input.
Serial Data In. MSB first, Binary Two’s Comple-
ment format.
No Internal Connection.
Convert Command In. DAC is updated on falling
edge, and initiates clocking new data in.
Digital Ground.
Latch Enable In. If LOW, DAC output will be
latched with new data word on falling edge of
Convert Command. If HIGH, Convert Commands
will be ignored.
Digital Ground.
Digital Ground.
–5V Digital Power.
Voltage Out.
Analog Ground.
VOS Adjust In.
MSB Adjust In.
Trim Reference Out for MSB adjustment.
+5V Analog Power.
Digital Ground.
Analog Ground.
®
5 DSP201/202
5 Page 
An alternative for calibrating on a bench is to tie SIN (DSP201
pin 13) or SINA and SINB (DSP202 pins 13 and 14) HIGH,
and provide a Bit Clock and periodic Convert Commands.
This loads 1111...1111 (FFFFHEX or 3FFFFHEX), driving the
output to 1LSB below 0V. Then periodically bring RESET
(pin 8) LOW for at least two Convert Commands, which is
the equivalent of loading all 0s, so the output is 0V. Now
the output can be adjusted for an ideal transition step.
ADJUSTING BIPOLAR ZERO ERROR
If it is important in a specific application to adjust bipolar
zero error, the user should first adjust the MSB trim circuits,
and then use the offset adjust circuits to adjust the outputs to
0V with input codes of all 0s (0000...0000; 0000 hex or
00000 hex.) In this case, it is not possible to also trim offset
at –Full Scale, as described above.
GAIN ERROR
Gain error on the DSP201 or DSP202 cannot be directly
adjusted. If required in a specific application, gain can be
trimmed out at the system level by adjusting the gain used
in an output amplifier stage, such as would be used in any
active output filter. In this case, the bipolar zero error should
be adjusted first as discussed above. Then, the gain on the
output amplifier should be adjusted to minimize the devia-
tion from ideal for –Full Scale (1000...000; 8000 hex or
20000 hex) and +Full Scale (0111...1111; 7FFF hex or
1FFFF hex.)
DSP201
–5V 1 VA –
2.2µF 0.01µF
+2
3
4 AGNDB
+5V +
2.2µF 0.01µF
5
6 VD +
7 VD +
8
9
10
11
12
13
14
AGND 28
27
VA + 26
VPOT 25
MSB 24
100kΩ
VOS 23
AGND 22
21
VD – 20
0.01µF
DGND 19
DGND 18
17
16
15
0.01µF
+ +5V
2.2µF
MSB Adjust
100kΩ
–5V Offset Adjust
100kΩ
–5V +5V
3.3kΩ
2.2µF
+
–5V
FIGURE 2. DSP201 Power Supply Connections and Optional Adjust Circuits.
®
11 DSP201/202
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet DSP201KP.PDF ] | |
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