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PDF EL5221C Data sheet ( Hoja de datos )
| Número de pieza | EL5221C | |
| Descripción | Dual 12MHz Rail-to-Rail Input-Output Buffer | |
| Fabricantes | Elantec Semiconductor | |
| Logotipo |  |
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EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Features
• 12MHz -3dB bandwidth
• Unity gain buffer
• Supply voltage = 4.5V to 16.5V
• Low supply current (per buffer) =
500µ A
• High slew rate = 10V/µs
• Rail-to-rail operation
Applications
• TFT-LCD drive circuits
• Electronics notebooks
• Electronics games
• Personal communication devices
• Personal Digital Assistants (PDA)
• Portable instrumentation
• Wireless LANs
• Office automation
• Active filters
• ADC/DAC buffer
Ordering Information
Part No.
EL5221CW-T7
EL5221CW-T13
EL5221CY-T7
EL5221CY-T13
Package
SOT23-6
SOT23-6
MSOP-8
MSOP-8
Tape & Reel
7”
13”
7”
13”
Outline #
MDP0038
MDP0038
MDP0043
MDP0043
General Description
The EL5221C is a dual, low power, high voltage rail-to-rail input-out-
put buffer. Operating on supplies ranging from 5V to 15V, while
consuming only 500µA per channel, the EL5221C has a bandwidth of
12MHz (-3dB). The EL5221C also provides rail-to-rail input and out-
put ability, giving the maximum dynamic range at any supply voltage.
The EL5221C also features fast slewing and settling times, as well as
a high output drive capability of 30mA (sink and source). These fea-
tures make the EL5221C ideal for use as voltage reference buffers in
Thin Film Transistor Liquid Crystal Displays (TFT-LCD). Other
applications include battery power, portable devices, and anywhere
low power consumption is important.
The EL5221C is available in space-saving SOT23-6 and MSOP-8
packages and operates over a temperature range of -40°C to +85°C.
Connection Diagrams
VINA 1
VS- 2
VINB 3
SOT23-6
6 VOUTA
5 VS+
4 VOUTB
VOUTA 1
NC 2
VINA 3
VS- 4
MSOP-8
8 VS+
7 VOUTB
6 NC
5 VINB
Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a “controlled document”. Current revisions, if any, to these
specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation.
© 2000 Elantec Semiconductor, Inc.
1 page  
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
Typical Performance Curves
Input Offset Voltage Distribution
2000
VS=±5V
TA=25° C
1600
Typical
Production
Distribution
1200
800
400
0
Input Offset Voltage (mV)
Input Offset Voltage vs Temperature
10
5 VS=±5V
0
-5
-10
-50
0 50 100
Temperature (°C)
Output High Voltage vs Temperature
4.97
4.96 VS=±5V
IOUT=5mA
4.95
150
4.94
4.93
-50
0 50 100
Temperature (°C)
150
Input Offset Voltage Drift
35
VS=± 5V
30 TA=25°C
25
20
15
10
5
0
Typical
Production
Distribution
Input Offset Voltage, TCVOS (µ V/°C)
Input Bias Current vs Temperature
4
2 VS=±5V
0
-2
-4
-50 0 50 100
Temperature (°C)
Output Low Voltage vs Temperature
-4.91
-4.92 VS=±5V
IOUT=-5mA
-4.93
-4.94
-4.95
-4.96
-4.97
-50
0 50 100
Temperature (°C)
150
150
5
5 Page 
EL5221C
Dual 12MHz Rail-to-Rail Input-Output Buffer
determine if load conditions need to be modified for the
buffer to remain in the safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
PDMAX = T----J---M-----A----X--Θ---–-J---AT----A----M-----A----X--
where:
TJMAX = Maximum Junction Temperature
TAMAX= Maximum Ambient Temperature
ΘJA = Thermal Resistance of the Package
PDMAX = Maximum Power Dissipation in the
Package
The maximum power dissipation actually produced by
an IC is the total quiescent supply current times the total
power supply voltage, plus the power in the IC due to the
loads, or:
PDMAX = Σi[VS × ISMAX + (VS+ – VOUTi ) × ILOADi ]
the device’s power derating curves. To ensure proper
operation, it is important to observe the recommended
derating curves shown in Figure 3 and Figure 4.
Package Mounted on a JEDEC JESD51-7 High
Effective Thermal Conductivity Test Board
1
870mW
MAX TJ=125°C
0.8
0.6
435mW
0.4
MSOP-8 115°C/W
0.2 SOT23-6 230°C/W
0
0 25 50 75 85 100 125 150
Ambient Temperature (°C)
Figure 3. Package Power Dissipation vs
Ambient Temperature
when sourcing, and
PDMAX = Σi[VS × ISMAX + (VOUTi – VS- ) × ILOADi ]
when sinking.
where:
i = 1 to 2 for Dual Buffer
VS = Total Supply Voltage
ISMAX = Maximum Supply Current Per Channel
VOUTi = Maximum Output Voltage of the
Application
ILOADi = Load Current
If we set the two PDMAX equations equal to each other,
we can solve for RLOADi to avoid device overheat. Fig-
ure 3 and Figure 4 provide a convenient way to see if the
device will overheat. The maximum safe power dissipa-
tion can be found graphically, based on the package type
and the ambient temperature. By using the previous
equation, it is a simple matter to see if PDMAX exceeds
Package Mounted on a JEDEC JESD51-3 Low
Effective Thermal Conductivity Test Board
0.6
486mW
0.5
MAX TJ=125°C
0.4
0.3
0.2
391mW
SOT23-6M2S5O6°PC-8/W206°C/W
0.1
0
0 25 50 75 85 100 125 150
Ambient Temperature (°C)
Figure 4. Package Power Dissipation vs
Ambient Temperature
Unused Buffers
It is recommended that any unused buffer have the input
tied to the ground plane.
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet EL5221C.PDF ] | |
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