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PDF DS90CF383 Data sheet ( Hoja de datos )
| Número de pieza | DS90CF383 | |
| Descripción | +3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link65 MHz | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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January 2000
DS90CF383
+3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD)
Link— 65 MHz
General Description
The DS90CF383 transmitter converts 28 bits of CMOS/TTL
data into four LVDS (Low Voltage Differential Signaling) data
streams. A phase-locked transmit clock is transmitted in par-
allel with the data streams over a fifth LVDS link. Every cycle
of the transmit clock 28 bits of input data are sampled and
transmitted. At a transmit clock frequency of 65 MHz, 24 bits
of RGB data and 3 bits of LCD timing and control data
(FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455
Mbps per LVDS data channel. Using a 65 MHz clock, the
data throughputs is 227 Mbytes/sec.
This chipset is an ideal means to solve EMI and cable size
problems associated with wide, high speed TTL interfaces.
Features
n 20 to 65 MHz shift clock support
n Single 3.3V supply
n Chipset (Tx + Rx) power consumption < 250 mW (typ)
n Power-down mode (< 0.5 mW total)
n Single pixel per clock XGA (1024x768) ready
n Supports VGA, SVGA, XGA and higher addressability.
n Up to 227 Megabytes/sec bandwidth
n Up to 1.8 Gbps throughput
n Narrow bus reduces cable size and cost
n 290 mV swing LVDS devices for low EMI
n PLL requires no external components
n Low profile 56-lead TSSOP package
n Falling edge data strobe Transmitter
n Compatible with TIA/EIA-644 LVDS standard
n ESD rating > 7 kV
n Operating Temperature: −40˚C to +85˚C
Block Diagram
DS90CF383
Order Number DS90CF383MTD
See NS Package Number MTD56
DS100033-1
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2000 National Semiconductor Corporation DS100033
www.national.com
1 page  
AC Timing Diagrams (Continued)
DS100033-9
Measurements at Vdiff = 0V
TCCS measured between earliest and latest LVDS edges
TxCLK Differential Low → High Edge
FIGURE 5. DS90CF383 (Transmitter) Channel-to-Channel Skew
DS100033-10
FIGURE 6. DS90CF383 (Transmitter) Setup/Hold and High/Low Times (Falling Edge Strobe)
DS100033-12
FIGURE 7. DS90CF383 (Transmitter) Clock In to Clock Out Delay
5 www.national.com
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet DS90CF383.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| DS90CF383 | +3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link65 MHz | National Semiconductor |
| DS90CF383 | DS90CF383 +3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz |  Texas Instruments |
| DS90CF383AMTD | +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz/ +3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz | National Semiconductor |
| DS90CF383B | DS90CF383B 3.3V Prog LVDS Transm 24-Bit FPD Link-65 MHz (Rev. E) | Texas Instruments |
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