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PDF LX8582A-00CP Data sheet ( Hoja de datos )
| Número de pieza | LX8582A-00CP | |
| Descripción | 8.5A LOW DROPOUT POSITIVE REGULATORS | |
| Fabricantes | Microsemi Corporation | |
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T H E I N F I N I T E P O W E R O F I N N O VAT I O N
L I N D O C #: 8582
LX8582A-xx
8 . 5 A LO W DR O P O U T PO S I T I V E RE G U L AT O R S
PR O D U C T I O N D ATA S H E E T
DESCRIPTION
The LX8582A series ICs are low
dropout three-terminal positive regula-
tors with 8.5A rated output current.
Processor applications such as the
Cyrix® 6x86TM & 6x86LTM, Pentium®
Processor and Power PCTM applications
requiring fast transient response are
ideally suited for this product family.
The LX8582A series products are
guaranteed to have < 1.3V at 8.5A
and are ideal to provide well-regulated
outputs of 2.5V to 3.6V using a 5V
input supply in the adjustable version,
or an output of 3.3V using a 5V input
supply in the fixed version.
Current limit is trimmed above 8.6A
to ensure adequate output current and
controlled short-circuit current. On-
chip thermal limiting provides protec-
tion against any combination of
overload that would create excessive
junction temperatures.
The LX8582A series ICs are available
in both the through-hole versions of the
industry standard 3-pin TO-220 and TO-
247 power packages.
For use in VRE applications, the
LX1431 Programmable Reference in
conjunction with this family of regula-
tors offers precision output voltage.
See the LX1431 data sheet for informa-
tion on this product.
PRODUCT HIGHLIGHT
CYRIX 6X86 VOLTAGE S UPPLY
3 . 3 8 V, 8 . 5 A R E G U L AT O R
VIN 4.75V
1500µF
6.3V
6MV1500GX
from Sanyo
IN LX8582A OUT
ADJ
VREF
IADJ = 50µA
VOUT = VREF
1+
R2
R1
+ IADJ R2
R1
121
1%
R2
205
1%
3.38V at 8.5A
2x 330µF, 6.3V
Oscon SA type
from Sanyo
-or-
4x 1500µF, 6.3V
6MV1500GX
from Sanyo
KEY FEATURES
s THREE-TERMINAL AJUSTABLE OR FIXED
OUTPUT
s GUARANTEED ≤ 1.3V HEADROOM AT 8.5A
s OUTPUT CURRENT OF 8.5A
p FAST TRANSIENT RESPONSE
p 1% VOLTAGE REFERENCE INITIAL
ACCURACY
p OUTPUT SHORT CIRCUIT PROTECTION
p BUILT-IN THERMAL SHUTDOWN
s EVALUATION BOARD AVAILABLE:
REQUEST LXE9001 EVALUATION KIT
A P P L I C AT I O N S
s CYRIX 6x86 & 6x86L APPLICATIONS
s PENTIUM PROCESSOR SUPPLIES
s POWER PC SUPPLIES
s MICROPROCESSOR SUPPLIES
s LOW VOLTAGE LOGIC SUPPLIES
s POST REGULATOR FOR SWITCHING SUPPLY
s LXE9001 EVALUATION BOARD FOR
PENTIUM APPLICATIONS AVAILABLE.
CONSULT FACTORY.
AVAILABLE O PTIONS PER PAR T #
Part #
Output
Voltage
LX8582A-00
Adjustable
LX8582A-33
3.3V
Other voltage options may be available —
Please contact factory for details.
Application of the LX8582A for the Cyrix 6x86 processor family.
This circuit is designed to have less than 130mV dynamic response to a 8.5A load transient.
Copyright © 1997
Rev. 1.1 1/97
PACKAGE ORDER INFORMATION
TA (°C)
Dropout
Voltage
P
Plastic TO-220
3-pin
V
Plastic TO-247
3-terminal
0 to 125
1.3V
LX8582A-xxCP
LX8582A-xxCV
"xx" refers to output voltage, please see table above.
FOR FURTHER INFORMATION CALL (714) 898-8121
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841
1
1 page  
PRODUCT DATABOOK 1996/1997
8 . 5 A LO W DR O P O U T PO S I T I V E RE G U L AT O R S
PR O D U C T I O N D ATA S H E E T
LX8582A-xx
APPLICATION NOTES
OVERLOAD RECOVERY (continued)
If this limited current is not sufficient to develop the designed
voltage across the output resistor, the voltage will stabilize at some
lower value, and will never reach the designed value. Under these
circumstances, it may be necessary to cycle the input voltage down
to zero in order to make the regulator output voltage return to
regulation.
RIPPLE REJECTION
Ripple rejection can be improved by connecting a capacitor
between the ADJ pin and ground. The value of the capacitor should
be chosen so that the impedance of the capacitor is equal in
magnitude to the resistance of R1 at the ripple frequency. The
capacitor value can be determined by using this equation:
C = 1 / (6.28 * FR * R1)
where: C ≡ the value of the capacitor in Farads;
select an equal or larger standard value.
FR ≡ the ripple frequency in Hz
R1 ≡ the value of resistor R1 in ohms
At a ripple frequency of 120Hz, with R1 = 100Ω:
C = 1 / (6.28 * 120Hz * 100Ω) = 13.3µF
The closest equal or larger standard value should be used, in this
case, 15µF.
When an ADJ pin bypass capacitor is used, output ripple
amplitude will be essentially independent of the output voltage. If
an ADJ pin bypass capacitor is not used, output ripple will be
proportional to the ratio of the output voltage to the reference
voltage:
M = VOUT/VREF
where: M ≡ a multiplier for the ripple seen when the
ADJ pin is optimally bypassed.
VREF = 1.25V.
For example, if VOUT = 2.5V the output ripple will be:
M = 2.5V/1.25V= 2
Output ripple will be twice as bad as it would be if the ADJ pin
were to be bypassed to ground with a properly selected capacitor.
OUTPUT VOLTAGE
The LX8582A develops a 1.25V reference voltage between the output
and the adjust terminal (See Figure 2). By placing a resistor, R1,
between these two terminals, a constant current is caused to flow
through R1 and down through R2 to set the overall output voltage.
Normally this current is the specified minimum load current of 10mA.
Because IADJis very small and constant when compared with the current
through R1, it represents a small error and can usually be ignored.
LX8582A
VIN IN OUT
ADJ
VREF
IADJ
50µA
VOUT = VREF
1
+
R2
R1
+ IADJ R2
VOUT
R1
R2
FIGURE 2 — BASIC ADJUSTABLE REGULATOR
LOAD REGULATION
Because the LX8582A is a three-terminal device, it is not possible to
provide true remote load sensing. Load regulation will be limited
by the resistance of the wire connecting the regulator to the load.
The data sheet specification for load regulation is measured at the
bottom of the package. Negative side sensing is a true Kelvin
connection, with the bottom of the output divider returned to the
negative side of the load. Although it may not be immediately
obvious, best load regulation is obtained when the top of the resistor
divider, (R1), is connected directly to the case of the regulator, not
to the load. This is illustrated in Figure 3. If R1 were connected to
the load, the effective resistance between the regulator and the load
would be:
RPeff = RP *
R2+R1
R1
where: RP ≡ Actual parasitic line resistance.
When the circuit is connected as shown in Figure 3, the parasitic
resistance appears as its actual value, rather than the higher RPeff.
LX8582A
ParRaPsitic
Line Resistance
VIN IN
OUT
ADJ Connect
R1 to Case
of Regulator
R1
R2 RL
Connect
R2
to Load
FIGURE 3 — CONNECTIONS FOR BEST LOAD REGULATION
Copyright © 1997
Rev. 1.1 1/97
5
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