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PDF CXG1122EN Data sheet ( Hoja de datos )

Número de pieza CXG1122EN
Descripción SP5T GSM Triple-Band/GPRS Antenna Switch
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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CXG1122EN
SP5T GSM Triple-Band/GPRS Antenna Switch
Description
The CXG1122EN is one of a range of low insertion
loss, high power MMIC antenna switches for GSM/
GPRS triple-band, dual-band (CXG1121TN) and
applications. The low insertion loss on transmit
means increased talk time as the Tx power amplifier
can be operated at a lower output level. On-chip logic
reduces the component count and simplifies the PCB
layout by allowing the direct connection of the switch
to digital baseband control lines with the CMOS logic
levels.
This switch is an SP5T, one antenna can be routed
to either of the 2 Tx or 3 Rx ports. It requires 3 CMOS
control lines (CTL1, CTL2 and Tx ON).
The Sony's GaAs JFET process is used for low
insertion loss. An evaluation PCB is available.
Features
Insertion loss: (Tx) 0.5dB typ. at 34dBm (GSM900)
3 CMOS compatible control lines
Low second harmonic: –40dBm typ. at 34dBm (GSM900)
Small package size: 16-pin VSON (2.7mm × 3.5mm × 0.9mm)
Applications
Triple-band handsets using the combinations of followings:
GSM900/DCS1800/PCS1900
GPRS
DECT
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25°C)
Bias voltage
VDD
7
Control voltage
VCTL
5
Operating temperature Topr –20 to +80
V
V
°C
16 pin VSON (Plastic)
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E01Z20-PS

1 page




CXG1122EN pdf
CXG1122EN
Application Note
Impedance Matching for Harmonic Minimization
This note outlines the method used to find the source impedance to present to a transmit port at the second
harmonic frequency (2fo) to reduce the second harmonic level at the antenna.
This should be carried out for a set of devices that represent the process variants. This way a compromise can
be found that suits all the variants.
The necessary equipment is shown immediately below.
Power Meter
Signal
Generator
B.P.F.
Fundamental, fo
Second Harmonic, 2fo
10dB
Coupler
Diplexer
Load Pull
Tuner
DC Block
D.U.T.
DC Block
Spectrum
Analyzer
The device should be mounted on a PCB with 50tracks running from all the RF pins to SMA connectors on
the PCB edge (DUT). All the ports should be externally DC blocked and the unused ports should be terminated in
50. All the measurements should be performed at the incident powers for which the harmonic levels are
specified in this document.
The 2nd harmonic level at the antenna port is measured using the spectrum analyzer and the vertical and
horizontal position of the load pull stub adjusted such that this level is minimized.
The device should then be removed from the board and an SMA connector mounted such that the source
impedance seen by the transmit port at 2fo can be measured using a VNA.
Measurements should be de-embedded to the end of the SMA center pin.
A network should then be designed to match the impedance of the low pass filter (LPF), which usually comes
in front of the device, to the 2fo source impedance that gives sufficiently reduced 2fo levels for all the devices
measured.
The network should be designed to maintain a good match and insertion loss at the fundamental frequency.
5

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