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PDF CXG1051AFN Data sheet ( Hoja de datos )
| Número de pieza | CXG1051AFN | |
| Descripción | Power Amplifier/Antenna Switch + Low Noise Down Conversion Mixer for PHS | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXG1051AFN
Power Amplifier/Antenna Switch + Low Noise Down Conversion Mixer for PHS
Description
The CXG1051AFN is an MMIC consisting of the
power amplifier, antenna switch and low noise down
conversion mixer.
This IC is designed using the Sony's GaAs J-FET
process featuring a single positive power supply
operation.
26 pin HSOF (Plastic)
Features
• Operates at a single positive power supply: VDD = 3V
• Small mold package: 26-pin HSOF
<Power amplifier/antenna switch transmitter block >
• Low current consumption: IDD = 150mA
(POUT = 20.2dBm, f = 1.9GHz)
• High power gain: Gp = 39dB Typ.
(POUT = 20.2dBm, f = 1.9GHz)
<Antenna switch receiver block/
low noise down conversion mixer>
• Low current consumption: IDD = 5.5mA Typ.
(When no signal)
• High conversion gain: Gc = 20.5dB Typ.
(f = 1.9GHz)
• Low distortion: Input IP3 = –13dBm Typ. (f = 1.9GHz)
• High image suppression ratio: IMR = 40dBc Typ.
(f = 1.9GHz)
• High 1/2 IF suppression ratio: 1/2IFR = 44dBc Typ.
(f = 1.9GHz)
Applications
Japan digital cordless telephones (PHS)
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings
<Power amplifier block>
• Supply voltage
VDD
• Voltage between gate and source
VGSO
• Drain current
IDD
• Allowable power dissipation
PD
6
1.5
550
3
V
V
mA
W
<Switch block>
Control voltage
VCTL
6
V
<Front-end block>
• Supply voltage
VDD 6 V
• Input power
PRF +10 dBm
<Common to each block>
• Channel temperature Tch
• Operating temperature Topr
• Storage temperature Tstg
150
–35 to +85
–65 to +150
°C
°C
°C
Recommended Operating Conditions
<Common to each block>
• Supply voltage
VDD
2.7 to 3.3 V
<Power amplifier block>
• Gain control voltage
VPCTL to VDD – 1.0 V
<Switch block>
• Control voltage (H)
VCTL (H) 2.9 to 3.3
• Control voltage (L)
VCTL (L) 0 to 0.2
Note on Handling
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
V
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E00225B25-PS
1 page  
CXG1051AFN
2. Antenna Switch Receiver Block + Low Noise Down Conversion Mixer (Ta = 25°C)
GC, NF vs. PLO
VDD = 3V, VCTL1 = 0V, VCTL2 = 3V,
RF = 1.90GHz/small signal,
LO = 1.66GHz
22
21
GC
20
19
18
NF
17
16
–25
–20 –15 –10
–5
PLO – Local input [dBm]
5.50
5.25
5.00
4.75
4.50
4.25
4.00
0
POUT, PIM3 vs. PIN
VDD = 3V, VCTL1 = 0V, VCTL2 = 3V,
RF1 = 1.9000GHz, RF2 = 1.9006GHz,
LO = 1.66GHz/–15dBm
20
0
POUT
–20
–40
PIM3
–60
–80
–100
–50
Input IP3
–40 –30 –20 –10
PIN – RF input power [dBm]
0
Input IP3, PLK vs. PLO
VDD = 3V, VCTL1 = 0V, VCTL2 = 3V,
RF = 1.90GHz/–35dBm,
LO = 1.66GHz
–10
Input IP3
–12
–14
–16
PLK
–18
–20
–22
–25
–20 –15 –10
–5
PLO – Local input [dBm]
–30
–35
–40
–45
–50
–55
–60
0
–5–
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet CXG1051AFN.PDF ] | |
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