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PDF CXD2434ATQ Data sheet ( Hoja de datos )
| Número de pieza | CXD2434ATQ | |
| Descripción | Timing Generator for Progressive Scan CCD Image Sensor | |
| Fabricantes | Sony Corporation | |
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CXD2434ATQ
Timing Generator for Progressive Scan CCD Image Sensor
Description
The CXD2434ATQ is an IC developed to generate
the timing pulses required by the Progressive Scan
CCD image sensors as well as signal processing
circuits. The CXD2434ATQ adds EFS operation
when using the high-speed electronic shutter and
other changes to the CXD2434TQ specifications.
48 pin TQFP (Plastic)
Features
• External trigger function
• Electronic shutter function
• Supports non-interlaced operation
• 30 frames/s
• Built-in driver for the horizontal (H) clock
• Base oscillation 1560 fH (24.5454 MHz)
Applications
Progressive Scan CCD cameras
Structure
Silicon gate CMOS IC
Applicable CCD Image Sensors
ICX084AK, ICX084AL
Absolute Maximum Ratings (Ta=25 °C)
• Supply voltage
VDD VSS –0.5 to +7.0 V
• Input voltage
VI VSS –0.5 to VDD +0.5 V
• Output voltage
VO VSS –0.5 to VDD +0.5 V
• Operating temperature
Topr
–20 to +75
°C
• Storage temperature
Tstg –55 to +150 °C
Recommended Operating Conditions
• Supply voltage
VDD 4.75 to 5.25
• Operating temperature
Topr
–20 to +75
V
°C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E97841-TE
1 page  
2. AC Characteristics
1) Waveform characteristics of H1, H2 and RG
0.9VDD
H1
0.1VDD
tRH1
tWH1
0.9VDD
H2
0.1VDD
tFH2
tWH2
0.9VDD
RG
0.1VDD
tRRG
tWRG
tFRG
tFH1
tRH2
CXD2434ATQ
Symbol
tRH1
tFH1
tWH1
tRH2
tFH2
tWH2
tRRG
tFRG
tWRG
VDD=5.0 V, Topr=25 °C, load capacitance of H1 and H2=100 pF, load capacitance of RG=10 pF
Definition
H1 rise time
H1 fall time
H1 high level time
H2 rise time
H2 fall time
H2 low level time
RG rise time
RG fall time
RG high level time
Min.
Typ.
Max.
Unit
6 15 ns
5 15 ns
25 35
ns
6 15 ns
5 15 ns
25 35
ns
2 5 ns
2 5 ns
10 15 20 ns
—5—
5 Page 
CXD2434ATQ
4. External trigger mode
External trigger mode starts exposure in sync with the external trigger input. No special pins are required to
set this mode.
The IC prepares to shift to external trigger mode with the falling edge of the TRIG pin (Note). The timing to
shift to external trigger mode varies according to the mode setting. (See the table.) The BUSY pin
maintains high status during external trigger mode. Whether or not to discharge the vertical CCD charge is
set by FSE.
Note) See the detection timing for VD, TRIG, EFS and ESG.
Mode settings during external trigger (Note 1)
PS SMD1 SMD2
Description of operation
L L X The IC is shifted to external trigger mode by HD, exposure is finished after the set
H L H time, and XSG is output. (Note 2) (Note 3)
The IC is shifted to external trigger mode by HD, exposure is finished 1/50 s later,
HL L
and XSG is output.
X H L Do not set for external trigger.
X H H Trigger input is not accepted.
Note 1) The SMD1 and SMD2 setting method varies according to the PS status. See “3. Electronic shutter”.
PS=Low : Set by serial input.
PS=High : Set by the SMD1 and SMD2 pins.
Note 2) The exposure time setting method is the same as the exposure time setting for the electronic shutter.
Note 3) When FSE=high, set the number of exposed lines from 1 to 522.
<FSE and discharge operation>
During external trigger mode, the previously exposed signal charge sometimes remains in the vertical CCD
when exposure finishes. In this case, the image shot with external trigger mode is output overlapped with
the previously shot image. Setting FSE to high performs discharge operation for signal charges remaining
in the vertical CCD after trigger input. Discharge operation is not performed when FSE is low. This setting
is only valid when SMD1 is low.
<Finishing the exposure period with ESG>
During external trigger mode, exposure can be finished in sync with the falling edge of ESG (Note). If
SMDE is set to low, the XSG pulse is output regardless of the electronic shutter setting, when the falling
edge of ESG is detected. ESG should be fixed to high status at all times other than during external trigger
mode. Do not change SMDE while BUSY is high.
Note) See the detection timing for VD, TRIG, EFS and ESG.
<Signal after external trigger mode>
After high-speed external trigger mode is finished, the exposure time differs from that performed by the
electronic shutter setting. This is because the start and finish of external trigger mode are not synchronized
to VD input.
—11—
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet CXD2434ATQ.PDF ] | |
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