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PDF CXD2027R Data sheet ( Hoja de datos )

Número de pieza CXD2027R
Descripción DBS Audio Signal Processor
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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No Preview Available ! CXD2027R Hoja de datos, Descripción, Manual

CXD2027Q/R
DBS Audio Signal Processor
For the availability of this product, please contact the sales office.
Description
The CXD2027Q/R are audio signal processors
designed for DBS applications. These LSIs perform
all digital processing from QPSK demodulation to
analog audio output on a single chip.
CXD2027Q
64 pin QFP (Plastic)
CXD2027R
80 pin LQFP (Plastic)
Features
QPSK and PCM demodulators and DAC output
are configured on a single chip.
Descrambler interface according to the COATEC
system and SkyPort system .
Functions
QPSK demodulator
• Carrier, clock and data regeneration
• ALC and VCXO adjustment-free
PCM demodulator
• Frame sync protection by correlation detection
• De-interleaving and descrambling
• BCH error correction, range bit error correction
• Audio data range control
Expansion from 10 to 14 bits in A mode
Upper bit majority correction in B mode
• Control sign integration correction, chargeable
flag integration correction by master frame
synchronization
• Interface output for external DAC
• Digital interface output
1-bit DAC output
• Quadruple oversampling filter
• Digital de-emphasis circuit
• 1-bit stereo DAC with 2nd-order ∆∑ format noise
shaper
S/N ratio : 90dB (Typ.)
Distortion : 0.011% (Typ.)
CPU interface
• I2C bus
Descrambler interface
• COATEC system, SkyPort system
Mute functions
• Error occurrence frequency detection mute
• Audio chargeable flag detection mute
• Control sign (B7) detection mute
Structure
Silicon gate CMOS IC
Applications
TVs, VCRs with built-in BS tuners
Absolute Maximum Ratings (Ta = 25°C, Vss = 0V)
Supply voltage
VDD Vss – 0.5 to +7.0 V
Input voltage
VI Vss – 0.5 to VDD + 0.5 V
Output voltage
VO Vss – 0.5 to VDD + 0.5 V
Storage temperature Tstg –55 to +150 °C
Operating Conditions
Supply voltage
VDD
Operating temperature Topr
4.75 to 5.25 V
–20 to +75 °C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E94808-ST

1 page




CXD2027R pdf
Pin Description 1
CXD2027Q (64pin QFP)
Pin
No.
Symbol
I/O
Pin Description
1 TST0
2 MRST
3 VSS Digital
4 BITO
5 BITI
I Test pin; normally low
I Master reset; H: normal operation; L: reset
— Digital ground
O Bit stream output after PSK demodulation
I Bit stream input after PSK demodulation
6 DSLB
7 DSLA
8 DATB
9 DATA
10 VDD Digital
11 CK2M
12 FRAM
I External descrambler pin
I External descrambler pin
I Data input 2 after BCH correction (for COATEC)
I Data input 1 after BCH correction (for SkyPort)
— Digital +5V power supply
O 2.048MHz clock output
O Frame start bit flag
13 DATO
14 CC1
15 TX
16 TST2
17 TST3
18 TST4
19 TST5
O Data output after BCH correction
O Control sign first bit output
O Digital format audio output
I Test pin; normally low
I Test pin; normally low
I Test pin; normally low
I Test pin; normally high
20 VSS Digital
21 VSS D/A
22 LNO
23 VDD D/A
24 LPO
25 VSS D/A
26 TST1
— Digital ground
— Analog ground
O Lch D/A converter output
— Analog +5V power supply
O Lch D/A converter output
— Analog ground
I Test pin; normally low
27 VSS D/A
28 RPO
29 VDD D/A
30 RNO
31 VSS D/A
32 VSS Digital
33 SASL
— Analog ground
O Rch D/A converter output
— Analog +5V power supply
O Rch D/A converter output
— Analog ground
— Digital ground
I I2C bus slave address select (L: D4, H: D6)
34 TST6
I Test pin; normally low
–5–
CXD2027Q/R
Remarks
Internal pull down
Internal pull up
TTL input
TTL input
TTL input
TTL input
TTL input
Internal pull down
Internal pull down
Internal pull down
Internal pull down
Internal pull down
Internal pull down

5 Page





CXD2027R arduino
CXD2027Q/R
Item
Symbol
Measurement
conditions
Normal input pin II
VIN = VSS or VDD
Input
leak
current
With pull-up
resistor
With pull-down
resistor
IIL
IIH
VIN = VSS
VIN = VDD
Bidirectional pin
(during input state)
II
VIN = VSS or VDD
Output leak current
(I2C bus)
IOZ VIN = VSS
1 Input pins other than 2, 3 and 4
2 MRST
3 TST0, TST1, TST2, TST3, TST4, SASL, TST6
4 BITI, DSLB, DSLA, DATB, DATA, TST5
5 SDA, SCLK
Corre-
Min. Typ. Max. Unit sponding
pins
–10 10 µA 1
–40 –100 –240 µA 2
40 100 240 µA 3
–40 40 µA 4
–10 –10 µA 5
[Oscillation cell electrical characteristics]
Item
Symbol
Measurement
conditions
Logic threshold value
LVth
Input voltage
VIH
VIL
Feedback resistance
RFB VIN = VSS or VDD
Output voltage
VOH IOH = –12mA
VOL IOL = 12mA
6 MCKI, M23I
7 MCKI, MCKO, M23I, M23O
8 MCKO, M23O
(VDD = 5V ± 0.25V, Ta = –20 to +75°C)
Min.
0.7VDD
Typ.
VDD/2
Max.
Corre-
Unit sponding
pins
V
V 6
250k
0.3VDD V
1M 2.5M 7
VDD/2
VDD/2
V 8
– 11 –

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