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PDF CXA3018R Data sheet ( Hoja de datos )
| Número de pieza | CXA3018R | |
| Descripción | Demodulator for Satellite Receivers | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXA3018R
Demodulator for Satellite Receivers
Description
The CXA3018R is an IC designed for video signal
demodulation for satellite broadcasting. This IC has
most of the functions needed for demodulation, and
provides stable video detection in combination with
the CXA3008N.
48 pin LQFP (Plastic)
Features
• PLL demodulation characteristics through built-in IF
AGC
• Compatible with both NTSC and PAL
• Applicable for 8 systems worldwide
• Keyed AFT input pin to support MUSE reception
• Output pin for 1st AGC control
• Built-in video clamp circuit
• C/N detection circuit
• Single 5 V power supply operation
Absolute Maximum Ratings (Ta = 25 °C)
• Supply voltage
VCC –0.3 to 7.0
• Operating temperature Topr –35 to +85
• Storage temperature Tstg –55 to +150
V
°C
°C
Operating Supply Voltage
VCC
4.50 to 5.50
V
Applications
NTSC/PAL system satellite receivers, etc.
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E95719-TE
1 page  
CXA3018R
Pin Typical pin voltage
Symbol
No. DC AC
20 GND3
0V
21 VCOB1 1.4 V
22 VCOE1 0.7 V
23 VCOE2 0.7 V
24 VCOB2 1.4 V
Equivalent circuit
24
23
3k
250 250
VCC1
21
22
3k 20k
GND3
Description
GND pin.
VCO constant setting pins.
25 SW A-IN
26 SW B-IN —
27 SW C-IN
VCC1
25
40k
26 2.5V
40k
27
50k 50k
GND1
Switching amplifier and video
amplifier mode setting pins.
28 LPF-N
4.5 V
29 LPF-P
260 260
28
29
VCC1
Mixer constant setting pins.
GND1
2.9 V
30 AGC-LPF to
3.0 V
30
30k
VCC1
150
GND1
AGC detection block filter pin.
Connect to GND with a 0.01 µF
capacitor.
1.0 V
2ndAGC
31 to
CONT
3.0 V
150
31 45k
VCC1
GND1
AGC detection block gain
adjustment pin.
OPAmp
32
IN-P
OPAmp
33
IN-N
—
VCC1
100 100
150 150
32 33
AGC detection block 1st AGC
input pins.
GND1
—5—
5 Page 
CXA3018R
Description of Operation
This IC consists of the following six function blocks. First, the signal flow is explained briefly, followed by the
functions of each block.
(1) AGC block
(2) FM demodulation block
(3) SWAMP block of video signal processor
(4) CLAMP & VAMP blocks of video signal processor
(5) AFT block
(6) C/N detection block
The 2nd IF differential signal input to Pins 38 and 39 passes through the AGC block to stabilize the signal
level and is then input to the FM demodulation block. The FM demodulated signal is then input to the
SWAMP and AFT blocks of video signal processor.
The SWAMP block outputs the detective signal from DETOUT after adjusting the gain to support worldwide
video systems. The detective signal output becomes the final video signal by being input to the CLAMP &
VAMP blocks through an external de-emphasis time constant block and an LPF. Also, part of the detective
signal output is input to the C/N detection block through an external BPF.
The AFT block detects the frequency lag of the 2nd IF signal by the voltage value of the detective signal
output, and outputs a command signal to the external frequency conversion block in order to correct the local
frequency.
The C/N detection block detects noise outside the video band and has a voltage output to indicate the C/N
noise level that is input (1st IF signal) to the receiver.
(1) AGC block
The 2nd IF differential signal is input to Pins 38 and 39 to fix the signal level with the AGC block. Connect a
capacitor which fixes the AGC loop time constant to Pin 30, and apply an adjustment voltage at the output
setting level of this AGC (2nd AGC) to Pin 31. The 2nd AGC control voltage is output from Pin 35. Apply the
starting level adjustment voltage of the 1st AGC for the 1st IF to Pin 32. Input the Pin 35 output to Pin 33
through a 10 kΩ resistor and the Pin 36 output through a 0.1 µF capacitor. Output the 1st AGC control
voltage from Pin 34, and output the voltage obtained by adding the 1st AGC control voltage of the Pin 34
output to the 2nd AGC control voltage of the Pin 35 output from Pin 36.
(2) FM demodulation block
The FM demodulation block is a PLL demodulator which consists of an oscillator (OSC), phase discriminator
and DCAMP. Connect the oscillator resonance circuit to Pins 21 to 24 and the loop filter to Pins 28 and 29.
The DCAMP differential output comes from Pins 18 and 19, and this output is used as the drive voltage for
the varicap that comprises the oscillator.
(3) SWAMP block of video signal processor
The SWAMP block of video signal processor amplifies only gains selected by LOGIC and outputs detective
signal output from Pin 42. The output from Pin 42 is output externally as the DETOUT (detective output)
signal. This signal enters an internal buffer from Pin 43 through the de-emphasis time constant block, and is
then output again from Pin 44. The Pin 44 BUFOUT output is input to VAMPIN after the high frequency
component outside of the video band is removed by an external LPF.
LOGIC controls SWAMP according to corresponding satellite switching commands (3 bits) input from Pins 25
to 27. In addition, the SWAMP gain is finely adjusted by applying the DETOUT level adjustment voltage from
Pin 41.
—11—
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet CXA3018R.PDF ] | |
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