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PDF CXA3003R Data sheet ( Hoja de datos )
| Número de pieza | CXA3003R | |
| Descripción | Baseband analog processing IC for dual-mode CDMA/FM cellular phone | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXA3003R
Baseband analog processing IC for dual-mode CDMA/FM cellular phone
For the availability of this product, please contact the sales office.
Description
The CXA3003R is a baseband analog processing
IC for dual-mode CDMA/FM cellular phone. The
CXA3003R interfaces between the inter-frequency
section and the digital processing circuitry of the
telephone. The receive circuit functions primarily
convert analog IF signals to the analog baseband
frequency range and to convert the analog
baseband signals into digital signals. Transmit
circuits convert digital data into analog baseband
signals which are then up-convert to the IF
frequency range.
Features
• Receive signal path includes:
· IF to baseband down conversion
· Built-in trim-free low-pass filter for CDMA and
FM
· Built-in A/D convertor convert the RX base
band signal to the digital signal
· Analog output Receive Signal Strength
Indicator (RSSI) for CDMA
· Local Oscillator for I-Q mixer
• Transmit signal path includes:
· Built-in D/A convertor convert the digital I-Q
data to the analog baseband signal
· Built-in trim-free low-pass filter for CDMA and
FM
· Baseband to IF up-conversion
· Local Oscillator for I-Q mixer
· Built-in PLL for TX IF
• Built-in House keeping A/D convertor
• Low power consumption in all modes
• Single 3.3 V power supply
80 pin LQFP (Plastic)
Absolute Maximum Ratings (Ta=25 °C)
• Supply voltage
VCC –0.3 to 5.5
• Operating temperature Ta –55 to +125
• Storage temperature Tstg –65 to +150
V
°C
°C
Recommended Operating Conditions
• Supply voltage
VCC 3.3±0.165
• Operating temperature Ta –40 to +85
V
°C
Applications
• dual-mode CDMA/FM cellular telephone
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E96434-TE
1 page  
Typical
Pin
Symbol Voltage (V)
No.
DC AC
18 PD ISET 0.64 V
CXA3003R
Equivalent circuit
VDD TXF
Description
150
18
Current of PD OUT setting pin.
19 PD OUT
20 GND SYNTH 0 V
21 VDD SYNTH 3.3 V
22 GND TXF 0 V
23 VDD TXF 3.3 V
24 LOCK DET
GND TXF
VDD TXF
6.25k
150
19
6.25k
GND TXF
VDD SYNTH
Transmit synthesizer charge
pump output pin.
Negative power supply pin for
PLL block.
Positive power supply pin for
PLL block.
Negative power supply pin for
TX block.
Positive power supply pin for
TX block.
150
24
Transmit IF synthesizer lock
detect output pin.
GND SYNTH
—5—
5 Page 
CXA3003R
Electrical Characteristics
DC Characteristics
(VDD=3.3 V±5 %, Ta=40 °C to 85 °C)
Item
Symbol
Condition
Min. Typ. Max. Unit
Power supply current - CDMA RXTX IDD1
40 57
Power supply current - CDMA Idle IDD2
25 35
Power supply current - CDMA sleep IDD3
2 3 mA
Power supply current - FM RXTX
IDD4
30 45
Power supply current - FM Idle
Logic High level input voltage
Logic Low level input voltage
Logic High level output voltage
Logic Low level output voltage
Logic input Leakage current
Input capacitance Digital input
Load capacitance Digital output
Load resistance Digital output
IDD5
VIH
VIL
VOH
VOL
IL
Cin-d
Cl-d
Rl-d
∗1
∗1
∗1
∗1
∗1
∗1
∗1
∗1
16 21
0.7xVDD
0.3xVDD
V
2.7
0.4
–100
100 µA
15
pF
15
100 k
Ω
∗1 : Logic Input pins = 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 61, 62, 75, 77, 78, 79
Logic Output pins =52, 53, 54, 55, 56, 57, 58, 59, 60, 63, 64, 73, 74
AC Characteristics
TXCLK/TXCLKB vs. TXIQDATA for CDMA mode
Item Symbol
Data Setup to TXCLK/TXCLKB
Transition
tsua
Data Hold after TXCLK/TXCLKB
Transition
tha
Condition
VDD=3.3 V±5 %, Ta=–40 °C to 85 °C
Min. Typ. Max. Unit
50
ns
50
TXCLK
(input)
TXCLKB
(input)
TXQDATA
(input)
tsua
tha
TXQ Data
TXI Data
TXCLK=4.9152MHz
Fig. 1 TXCLK/TXCLKB vs. TXIQDATA Timing Diagram for CDMA mode
CHIPx8 vs. RXIQDATA
Item
Data Output stable prior to CHIPx8 fall
Data Hold after CHIPx8 fall
CHIPx8 raise time
CHIPx8 fall time
Symbol
tsub
thb
trb
tfb
VDD=3.3 V±5 %, Ta=–40 °C to 85 °C
Condition
Min. Typ. Max. Unit
20
10 % to 90 %, Cload=15 pF
15
3
3
7.2
9.9
ns
—11—
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CXA3003R.PDF ] | |
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