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Número de pieza | CXA2112R | |
Descripción | LCD Driver | |
Fabricantes | Sony Corporation | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de CXA2112R (archivo pdf) en la parte inferior de esta página. Total 23 Páginas | ||
No Preview Available ! CXA2112R
LCD Driver
For the availability of this product, please contact the sales office.
Description
The CXA2112R is a driver IC developed for use in
the 6-input/12-input Sony polysilicon TFT LCD panel
(LCX016/017). It has a line invert amplifier and
analog de-multiplexers, timing generator and output
buffers required for these. CXA2112R can directly
drive analog inputs of LCX016/017. It is used one IC
with the LCX016, and two ICs with the LCX017. The
VCOM setting circuit and pre-charge pulse waveform
generator are also on-chip.
64 pin LQFP (Plastic)
Features
• High-speed signal processing supports XGA high refresh signal (dot clock to 100MHz)
• Overall wide band response
• Low output deviation by on-chip output offset cancel circuit
• Small phase delay difference between inverted signal and non-inverted signal
• On-chip timing generator with ECL
• Dot clock phase adjustment function
• VCOM voltage generation circuit
• Pre-charge pulse waveform generation circuit
Absolute Maximum Ratings
• Supply voltage
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation
VCC
VDD
PD
16
5.5
–20 to +70
–65 to +150
2300
V
V
°C
°C
mW (single layered board mounted)
Operating Conditions
• Supply voltage
• Supply voltage
VCC 15 to 15.5
VDD 4.75 to 5.25
V
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E97801A81-PS
1 page CXA2112R
Pin
No.
Symbol
I/O
Standard
voltage level
37 ISET
I 1.35V
Equivalent circuit
VCC
45µ
VCC
145
37
VCC
10µ
2k
4p
Description
Vcc circuit bias current
setting.
Normally, connect 27kΩ
(±1%) between this pin and
GND.
38 SID_OUT O 2.5 to 11.5V
VCC
VCC
38
75k
0.2p
75k
0.2p
23 PGND
26 PVCC
32 GND2
39 SID_IN
GND
15.5V
GND
I 2.3 to 3.3V
VCC
19.5k
39
19.5k
91k
7V VCC
78k
SID signal waveform output.
Connect to an external
buffer for panel.
Power GND.
Power Vcc.
Connect directly to Vcc.
Analog GND.
SID signal input.
42 SID_OFST I
3.3V
VCC
30k
42
10µ
SID signal input offset
setting.
44 FRP
I
High: ≥ 2.5V
Low: ≤ 0.8V
VDD
VDD 50k
10k
44
VDD
100k
50k
Invert pulse input.
High: inverse
Low: non-inverse
Refer to Timing Chart.
–5–
5 Page CXA2112R
Electrical Characteristics Measurement Circuit
VIN
2V
2.3V
VSID_IN
3.3V
VINV
3.3V
VCC
IVCC1
27k
C7
VCC
20k
VCC
20k
VSID
VCOM
DIFF
BUFFER2 P
Frequency
fCLK
N
VDD
SW4
VDD
DLY_CNT
49
MCLK
50
MCLK/
51
INV_CNT
52
VDD
53
CLK_OUT
54
CLK_OUT/
55
D.P
56
D.P
57
DGND
58
CLK_IN
59
NC
60
CLK_IN/
61
PRG
62
NC
63
NC
64
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
INVERT
AMP
SID
BIAS
VCOM
D
CLOCK
DELAY
S/H
S/H
S/H
Pulses
TIMING
GENERATOR
S/H
S/H
S/H
offset cancel
mode timing
S/H
S/H S/H BUFFER
OFFSET CANCEL
S/H S/H
BUFFER
OFFSET CANCEL
S/H S/H
BUFFER
OFFSET CANCEL
S/H S/H
BUFFER
OFFSET CANCEL
S/H S/H
BUFFER
OFFSET CANCEL
S/H S/H
BUFFER
OFFSET CANCEL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
GND2
32
SH_OUT1
31
VOUT1
NC
30
SH_OUT2
29
C1 270pF
VOUT2
NC
28
C2 270pF
SH_OUT3
27 VOUT3
IVCC2
PVCC
26
D.P
C3 270pF
VCC
25
D.P
24
PGND
23
NC
22
21 SH_OUT4
NC
20
SH_OUT5
19
NC
18
SH_OUT6
17
VOUT4
C4 270pF
VOUT5
C5 270pF
VOUT6
C6 270pF
VDD
SW1
VDD
SW2
VDD
SW3
VCC
VDD
15.5V
5V
– 11 –
11 Page |
Páginas | Total 23 Páginas | |
PDF Descargar | [ Datasheet CXA2112R.PDF ] |
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