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PDF CXA2096 Data sheet ( Hoja de datos )
| Número de pieza | CXA2096 | |
| Descripción | Digital CCD Camera Head Amplifier | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CXA2096 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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CXA2096N
Digital CCD Camera Head Amplifier
Description
The CXA2096N is a bipolar IC developed as a
head amplifier for digital CCD cameras. This IC
provides the following functions: correlated double
sampling, AGC for the CCD signal, A/D sample and
hold, blanking, A/D reference voltage, and an output
driver.
Features
• High sensitivity made possible by a high-gain AGC
amplifier
• Blanking function provided for the purpose of
calibrating the CCD output signal black level
• Regulator output pin provided for A/D converter
reference voltage
• Built-in sample-and-hold circuits for camera signals
required by external A/D converters
Absolute Maximum Ratings
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation
VCC
Topr
Tstg
PD
11
–20 to +75
–65 to +150
417
V
°C
°C
mW
Operating Conditions
Supply voltage
VCC1, 2, 3 3.0 to 3.6
V
Applications
DVC/still cameras for consumer use
Structure
Bipolar silicon monolithic IC
24 pin SSOP (Plastic)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E97449B8Y
1 page  
Pin
No.
Symbol
Pin voltage
Equivalent circuit
CXA2096N
Description
11 XRS
VTH = 0.68V
40µA
24k
Sampling
0.68V
7k
97µ
770µA
145 11 Camera signal
sample-and-hold
pulse input.
VTH = 1.5V
12 CLPOB
Active: Low
30k
30k
1.5V
Clamp pulse used to
145 clamp the optical
12 black portion of the
camera signal after it
30k
50µA
passes through the
AGC amplifier.
13 AGCCLP Approx. 1.3V
5k 5k
50k
3k
145
145
3k
AGC clamp capacitor.
13 (Recommended
value: 0.1µF)
14 AGCCONT 1.5 to 3.0V
3.3k
3.3k
AGC gain control.
145 When 1.5V: –1dB
14
(Minimum
3.4k
2.14V
3.4k
3.4k
2.29V
3.4k
gain)
When 3.0V: 31.5dB
(Maximum
ICONT 300µA 100µA
300µA 100µA
200µA
200µA
gain)
–5–
5 Page 
CXA2096N
Description of Operation
Refer to the Block Diagram.
Operating Conditions
The camera signal processing system operates when PS is High.
Timing Chart (when VCC = 3V)
CCD output
Signal interval
Precharge level
OPB interval
Idle transfer
interval
Signal interval
SHP
SHD
SH1 output
SH2 output
SH3 output
CLPDM
(2µ dummy bit portion
during the idle transfer
interval)
AGC output
SH3 output
–SH2 output
× (–N)
XRS
CLPOB
(2µ during the OPB interval)
CAMSH output
PBLK
(10µ during the idle
transfer interval)
Signal level
2.1V
[∗1]
[∗2]
2.1V
Basic black
level
[∗3]
0.65V
2µs
Black level
2µs
0.65V
10µs
BLK SW output
1.35V
[∗4]
DRVOUT output
– 11 –
[∗5]
Approx. VRB + 35mV when OFFSET = 0V
Approx. VRB + 100mV when OFFSET = 1.5V
Applox. VRB when OFFSET = 3V
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CXA2096.PDF ] | |
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