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PDF CXA2055P Data sheet ( Hoja de datos )
| Número de pieza | CXA2055P | |
| Descripción | Preamplifier for High Resolution Computer Display | |
| Fabricantes | Sony Corporation | |
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CXA2055P
Preamplifier for High Resolution Computer Display
Description
The CXA2055P is a bipolar IC developed for high
resolution computer displays.
28 pin DIP (Plastic)
Features
• Built-in wide band amplifier
(130 MHz/–3 dB typ.@4 Vp-p)
• Input dynamic range : 1.0 Vp-p (typ.)
• R, G and B in a single package
• I2C bus control
Contrast control
Subcontrast control
Brightness control
OSD contrast control
Power save function
Input clamp pulse polarity selection
Output composite sync polarity selection
5-channel, 8-bit D/A
Blanking level control
• Built-in sync separator (G channel only)
• Built-in blanking mixing function
• Built-in OSD mixing function
• Built-in ABL function
• Video interval detection function
Applications
High resolution computer displays
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings (Ta=25 °C)
• Supply voltage
VCC
14 V
• Operating temperature
Topr
–20 to +75 °C
• Storage temperature Tstg
–65 to +150 °C
• Allowable power dissipation
PD 1794 mW
(when mounted on a 11.5 cm × 12.0 cm substrate)
Operating Conditions
Recommended supply voltage
VCC1
VCC2
12±0.5
5±0.25
1 SDA VDET/COFF-RGB 28
2 SCL DA/CSYNC/ABL 27
3 COFF-R
R-S/H 26
4 COFF-G
R-OUT 25
5 COFF-B
GND-R 24
6 RIN
G-S/H 23
7 VCC2
G-OUT 22
8 GIN
GND-G 21
9 SYNC CON
VCC1 20
10 BIN
B-S/H 19
11 CLP
B-OUT 18
12 OSD-R
GND-B 17
13 OSD-G
BLK 16
14 OSD-B
YS 15
V
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
—1—
E96Z18-TE
1 page  
CXA2055P
Pin
Symbol
No.
17 GND-B
Pin
voltage
21 GND-G
0V
24 GND-R
18 B-OUT
Equivalent circuit
Description
R, G and B independent GND.
VCC1
22 G-OUT
25 R-OUT
—
200
18
22
25
GND
R, G and B outputs.
19 B-S/H
23 G-S/H
—
26 R-S/H
21 VCC1
12 V
DA
27 /CSYNC
/ABL
VDET
28
/COF-RGB
—
1k 1k
1k
1k
225µA
2.5V
VCC2
27
GND
5k
100
100k
100
4k
50k
7.4k
100 5k
100
100
—5—
VCC1
Connection for external sample-
19
23 and-hold capacitor (0.1 µF).
26
GND
12 V power supply.
General-purpose D/A converter
output. Composite sync output.
TTL drive is possible.
1V VL=0.5 V or less, VH=4.0 V or more
RGB output amplitude gain
compensation input.
(common for all three channels)
Function switching is performed
via the I2C bus.
VCC2 Video signal detection output.
VL=0.5 V or less, VH=4.0 V or more
General-purpose D/A converter
28 output.
The variable range is 1 to 4 V.
Function switching is performed
GND via the I2C bus.
5 Page 
CXA2055P
1. Application
The CXA2055P is a preamplifier for computer displays, and combines three R, G and B channels into a
single package. All controls such as the contrast and black level for each channel are performed via I2C
bus control.
1) I2C bus
Two wires (SDA, SCL) provide control over start, stop, data transfer, synchronization and collision
avoidance. The IC outputs are either open collector or open drain, forming a bus line in the wired OR
format. The bus signal configuration is as follows.
SDA
D ATA
A DA TA
MSB
LSB MSB
SCL
S
START
1
23 456 789 12
S : Start condition; SDA is set at “low” when SCL is “high”.
P : Stop condition; SDA is set at “high” when SCL is “high”.
A : Acknowledge; Signal sent from the slave.
3
LSB
P
9
STOP
Data is transmitted by MSB-first. One data unit consists of 8 bits, to which the acknowledge signal,
which indicates that the data has been accepted by the slave, is attached at the end. Normally, the
slave ∗1 IC receives data at the rising edge of SCL and the master ∗2 IC changes data at the falling edge
of SCL. The actual data format is as follows.
Slave address
S 40H A
Subaddress
∗∗H
A DATA0 A DATA1 A DATA2 A P
BIT8
BIT7
Slave address configuration
BIT6 BIT5 BIT4
Slave address
BIT3
BIT2
BIT1
R/W
The slave address is an address unique to each IC, and is assigned according to the IC functions. The
upper 7 of the 8 bits are the unique address and the final bit is the R/W bit. The R/W bit indicates read
∗3 when 1 and write ∗4 when 0. 40H is allotted as the slave address for the CXA2055P. (This is write
only and there is no read mode.)
The subaddress is the assigned address within the IC, and is used for the various IC adjustments. The
subaddress is sent just once following the slave address, and is automatically incremented thereafter
until a stop condition is sent.
∗1 Slave : An IC that is placed under the control of the master.
In a normal system, all devices excluding the central microcomputer are slaves.
∗2 Master : A central microcomputer or other controlling IC.
∗3 Read : Mode where data is read from master to slave.
∗4 Write : Mode where data is written from master to slave.
—11—
11 Page | ||
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| PDF Descargar | [ Datasheet CXA2055P.PDF ] | |
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