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PDF CXA1977R Data sheet ( Hoja de datos )

Número de pieza CXA1977R
Descripción 10-bit 20MSPS A/D Converter
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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No Preview Available ! CXA1977R Hoja de datos, Descripción, Manual

10-bit 20MSPS A/D Converter
CXA1977R
Description
The CXA1977R is a 10-bit 20MSPS 2-step parallel
type A/D converter for video signal processing.
This A/D converter operates on +5V power
supplies. The analog signal can be converted to the
digital signal by using this IC in conjunction with the
Sample-and-hold IC.
48 pin LQFP (Plastic)
Features
• Maximum operating speed : 20MSPS (Min.)
• Resolution
: 10-bit
• Low power dissipation : 160mW (Typ.)
• Wide-band analog input : 10MHz
• Low input capacitance : 50pF (Typ.)
• Built-in digital correction
(Compensation within ±16LSB)
• TTL input
• TTL output
• Output code : binary/2'S complement/1'S complement
Function
10-bit 20MSPS 2-step parallel type A/D converter
Structure
Bipolar silicon monolithic IC
Applications
High resolution video signal processing
Block Diagram
N.C. 37
N.C. 38
VINL 39
VINH 40
N.C. 41
AVCC 42
N.C. 43
AGND 44
DVCC2 45
UNDER 46
OVER 47
DGND1 48
36 35 34 33 32 31 30 29 28 27 26 25
MATRIX
H-COMPARATOR
H-ENCODER
OVER/UNDER
OUTPUT BUFFER
FINE OUTPUT
BUFFER
CORRECTION
COARSE OUTPUT
BUFFER
1 2 3 4 5 6 7 8 9 10 11 12
24 PS
23 ENABLE
22 CLK
21 MINV
20 LINV
19 N.C.
18 DVCC3
17 DGND2
16 DGND1
15 DVCC1
14 DGND1
13 N.C.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E94326-PS

1 page




CXA1977R pdf
CXA1977R
Pin No. Symbol I/O Pin voltage
Equivalent circuit
Description
39 VINL
I +2V to +4V
VINL 39
11.2k
11.2k
42 AVCC
Analog input
(Lower comparator
VREF input)
44 AGND
40 VINH
I +2V to +4V VINH 40
42 AVCC
— +5V (Typ.)
7, 13,
19, 27
N.C.
——
28, 36,
37, 38, N.C.
41, 43
——
26k 26k
42 AVCC
Analog input
VREF (Upper comparator
input)
44 AGND
Analog power supply
Open.
Not connected to
internal circuit, but
connection to DGND
(digital ground) is
recommended.
Open.
Not connected to
internal circuit, but
connection to AGND
(analog ground) is
recommended.
–5–

5 Page





CXA1977R arduino
CXA1977R
12. Digital output (D0 to D9)
Output pin of D9 (MSB) to D0 (LSB).
TTL output.
Output data polarity inversion is executed by means of MINV and LINV signals, and they can output in
binary, 1'S complement and 2'S complement.
Also, by turning ENABLE signal to high level, the output can be turned into high impedance output.
However, when the output level is for high impedance output or is in power save mode, the voltage of 3.6V
or more must not be applied to prevent the distruction of IC.
For correspondence with analog input voltage and output data code, refer to the Output Formula Chart. For
the timing, refer to the Timing Chart.
13. Overflow output (OVER)
When the input signal exceeds VREFT, overflow signal is output.
MINV and LINV have no effect on this pin.
Also by turning ENABLE signal to high level, the output can be turned into high impedance output.
However, when the output level is for high impedance output or is in power save mode, the voltage of 3.6V
or more must not be applied to prevent the distruction of IC.
For correspondence with analog input voltage and output data code, refer to the Output Formula Chart.
For the timing, refer to the Timing Chart.
14. Underflow output (UNDER)
When the input signal turns below VREFB, underflow signal is output.
MINV and LINV have no effect on this pin.
Also by turning ENABLE signal to high level, the output can be turned into high impedance output.
However, when the output level is for high impedance output or is in power save mode, the voltage of 3.6V
or more must not be applied to prevent the distruction of IC.
For correspondence with analog input voltage and output data code, refer to the Output Formula Chart.
For the timing, refer to the Timing Chart.
– 11 –

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