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PDF CY7C64613 Data sheet ( Hoja de datos )

Número de pieza CY7C64613
Descripción EZ-USB FX USB Microcontroller
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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No Preview Available ! CY7C64613 Hoja de datos, Descripción, Manual

CY7C64613
EZ-USB FX™ USB Microcontroller
Cypress Semiconductor Corporation
Document #: 38-08005 Rev. *B
• 3901 North First Street
• San Jose, CA 95134 • 408-943-2600
Revised April 22, 2003

1 page




CY7C64613 pdf
CY7C64613
— Handles much of the low-level USB protocol in logic, simplifying 8051 code
• General Programmable InterFace (GPIF)
— Allows direct connection to most parallel interfaces: 8- and 16-bit wide
— Eliminates external glue logic in most applications
— Programmable Waveform Instructions and Configuration Registers to define waveforms
— Six Ready (RDY) inputs and six Control (CTL) outputs
• Vectored interrupt system expanded for USB, FIFO flags and DMA interrupts
• Separate buffers for SETUP and DATA portions of a CONTROL transfer
• Integrated I2C-compatible controller
— 400-KHz or 100-KHz operation
• Enhanced I/O
— I/O port registers mapped to 8051 SFRs (Special Function Registers) for high-speed bit operations
— Port bits can be controlled using 8051 bit addressing instructions
— Up to five 8-bit I/O ports
• Four integrated 8-bit-wide FIFOs
— Each 64 bytes deep
— Automatic conversion to and from 16-bit buses
— Easy, glueless interface to ASIC, DSP ICs and external logic
— Brings glue FIFOs inside for lower system cost
— Internal or external clock
— Synchronous (using strobes and a clock) or asynchronous (using strobes only)
• DMA controller
— Moves data between slave FIFOs, memory, and ports
— Very fast transfers—one clock (20.8 ns = 48 MHz) per byte for internal transfers
— Can use external RAM as additional FIFO (accessed via Address and Data buses)
• Special Autovectors for DMA and FIFO interrupts
• Glueless external memory expansion
— Up to 16-bit address bus and 8-bit data bus
— Strobes RD#, WR#, OE#, CS#, and PSEN#
— Buses not multiplexed (as in standard 8051), saving one clock per external memory cycle
• Three package options128-pin PQFP, 80-pin PQFP, and 52-pin PQFP
1.2 Example Applications
• DSL modems
• ATAPI interface
• Memory card readers
• Legacy conversion devices
• Cameras
• Scanners
• Home PNA
• Wireless LAN
• MP3 players
• Networking
Document #: 38-08005 Rev. *B
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CY7C64613 arduino
3.0 Pins
3.1 Pin Diagrams
CY7C64613
VCC
SCL
SDA
WAKEUP#
AVCC
XIN
XOUT
AGND
RESERV ED
PA4 / FWR# / RDY4 / SLWR
PA5 / FRD# / RDY5 / SLRD
C L KOUT
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
52 PQFP
10 x 10 mm
39 GND
38 XCLK
37 CTL2 / AOUTFLAG
36 PB7 / T2OUT / D[7] / GDA[7] / AFI[7]
35 PB6 / INT6 / D[6] / GDA[6] / AFI[6]
34 PB5 / INT5# / D[5] / GDA[5] / AFI[5]
33 PB4 / INT4 / D[4] / GDA[4] / AFI[4]
32 PB3 / TxD1 / D[3] / GDA[3] / AFI[3]
31 PB2 / RxD1 / D[2] / GDA[2] / AFI[2]
30 PB1 / T2EX / D[1] / GDA[1] / AFI[1]
29 PB0 / T2 / D[0] / GDA[0] / AFI[0]
28 RESET#
27 VCC
Figure 3-1. CY7C64613 52-pin PQFP Assignment
Document #: 38-08005 Rev. *B
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