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PDF CY7C64601 Data sheet ( Hoja de datos )
| Número de pieza | CY7C64601 | |
| Descripción | EZ-USB FX USB Microcontroller Data Sheet | |
| Fabricantes | Cypress Semiconductor | |
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4601/603/61
CY7C64601/603/613
CY7C64601/603/613
EZ-USB FX USB Microcontroller
Data Sheet
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-08005 Rev. **
Revised September 21, 2001
1 page  
CY7C64601/603/613
2.1 Microprocessor
The CY7C646xx uses a 12-MHz crystal for low EMI. An internal oscillator and PLL develops an internal 48-MHz clock for use by
the USB Serial Interface Engine and the 8051 microprocessor. The 8051 can run at either 24 MHz or 48 MHz, controlled by a
byte in the EEPROM attached to the I2C bus. The default rate (with no EEPROM connected) is 24 MHz.
The internal microprocessor is an enhanced version of the industry-standard 8051. Enhancements include 4 clock per cycle
operation, a second data pointer, and an enhanced interrupt system. The 8051 includes two UARTS, three counter-timers, and
256 bytes of register RAM.
The EZ-USB family implements IO differently than the standard 8051, by having its IO control registers in external memory space.
The CY7C646xx preserves this addressing for backward EZ-USB compatibility, and adds the ability to control IO registers using
8051 SFRs (Special Function Registers). This improves IO access time. For example, an IO pin may be toggled using one 8051
instruction, e.g., CPL (bit).
The 8051 program and data memory consists of an internal 8 KB RAM. This RAM is normally downloaded via the USB cable at
plug-in, followed by the 8051 starting up and executing the downloaded code. This gives the CY7C646xx family its ‘soft’ operation
feature, whereby permanent memory such as ROM or Flash memory is not required. Program code updates can easily be done
in the field since the code is loaded from the PC, not by physically changing or reprogramming a memory device. The 8051
program memory can also be loaded from the EEPROM connected to the I2C bus on reset for stand-alone use without the USB
connected.
The 128-pin version of the CY7C646xx brings out the full 8051 address and data buses, plus decoded control signals OE#, CS#,
RD#, PSEN, and WR# to allow glueless connection to external memory devices. The 80- and 52-pin packages allow smaller
footprints and more effective solutions for certain designs, but do not have external access to the 8051 buses.
2.2 USB SIE
The CY7C646xx uses the EZ-USB family enhanced SIE (Serial Interface Engine). This SIE has the intelligence to perform full
USB enumeration, creating a default USB device with predefined endpoints and alternate settings. This enhanced SIE is essential
in achieving the family’s soft operation, since it provides the mechanism to download firmware prior to the 8051 running.
Once the 8051 is in control, it can use advanced features of the SIE to simplify its USB firmware. Endpoint zero SETUP data is
placed in a separate 8-byte RAM space for easy access. GET_Descriptor requests are simplified by using a special Setup Data
Pointer. The 8051 simply loads a descriptor address into this 16-bit register, and the SIE takes care of the remaining overhead,
i.e., dividing the descriptor into packets, sending them via endpoint 0 in response to IN tokens, and providing the necessary
handshakes. The 8051 can do other chores while the SIE completes this USB transfer.
Document #: 38-08005 Rev. **
Page 5 of 42
5 Page 
CY7C64601/603/613
BSEL
AOE
A0
A1
A2
A3
VCC
PC0/RxD0
PC1/TxD0
PC2/INT0#
PC3/INT1#
A4
A5
A6
A7
A8
GND
A9
A10
A11
PC4/T0
PC5/T1
PC6/WR#
PC7/RD#
A12
A13
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
128 PQFP
14 x 20 mm
64 PD7/BFI[7]
63 PD6/BFI[6]
62 GND
61 PD5/BFI[5]
60 PD4/BFI[4]
59 PD3/BFI[3]
58 PD2/BFI[2]
57 PD1/BFI[1]
56 PD0/BFI[0]
55 VCC
54 RESERVED
53 RESERVED
52 GND
51 EA
50 RESERVED
49 RESERVED
48 DISCON#
47 GND
46 SLRD
45 SLWR
44 BOE
43 No Connect
42 No Connect
41 BKPT
40 GND
39 RESERVED
3.2
128
18
CY7C646xx Pin Descriptions
80 52
Name
Type
5 5 AVCC
Power
21 8 8 AGND
Power
48 28 18 DISCON#
O/Z
Default
N/A
N/A
H
Description
Analog VCC. This signal provides power to the analog section of
the chip.
Analog Ground. Connect to ground with as short a path as possi-
ble.
Disconnect. This pin can drive HIGH, LOW, or float. DISCON# pin
floats when the register bit USBCS.2 is LOW, and drives when it is
HIGH. The drive level of the DISCON# pin is the invert of register
bit USBCS.3.
The DISCON# pin is normally connected to the USB D+ line through
a 1500Ω resistor. The CY7C646xx signals a USB connection by
setting USBCS.3=0 (drive 3.3V) and USBCS.2=1 (output enable).
The CY7C646xx signals a USB disconnect by setting USBCS.2=0
which floats the pin and disconnects the 1500Ω resistor from D+.
Document #: 38-08005 Rev. **
Page 11 of 42
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CY7C64601.PDF ] | |
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