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PDF LTC2420C Data sheet ( Hoja de datos )
| Número de pieza | LTC2420C | |
| Descripción | 20-Bit uPower No Latency ADC in SO-8 | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Final Electrical Specifications
LTC2420
20-Bit µPower
No Latency ∆ΣTM ADC in SO-8
FEATURES
DESCRIPTIO
January 2000
s 20-Bit ADC in SO-8 Package
s 8ppm INL, No Missing Codes at 20 Bits
s 4ppm Full-Scale Error
s 0.5ppm Offset
s 1.2ppm Noise
s Digital Filter Settles in a Single Cycle. Each
Conversion Is Accurate, Even After an Input Step.
s Internal Oscillator—No External Components
Required
s Fast Mode: 16-Bit Noise, 12 Bits TUE at 100sps
s 110dB Min, 50Hz/60Hz Notch Filter
s Reference Input Voltage: 0.1V to VCC
s Live Zero—Extended Input Range Accommodates
12.5% Overrange and Underrange
s Single Supply 2.7V to 5.5V Operation
s Low Supply Current (200µA) and Auto Shutdown
s Pin Compatible with 24-Bit LTC2400
U
APPLICATIO S
s Weight Scales
s Direct Temperature Measurement
s Gas Analyzers
s Strain-Gage Transducers
s Instrumentation
s Data Acquisition
s Industrial Process Control
s 4-Digit DVMs
The LTC®2420 is a micropower 20-bit A/D converter with
an integrated oscillator, 8ppm INL and 1.2ppm RMS
noise that operates from 2.7V to 5.5V. It uses delta-sigma
technology and provides a digital filter that settles in a
single cycle for multiplexed applications. Through a single
pin, the LTC2420 can be configured for better than 110dB
rejection at 50Hz or 60Hz ±2%, or it can be driven by an
external oscillator for a user-defined rejection frequency
in the range 1Hz to 800Hz. The internal oscillator requires
no external frequency setting components.
The converter accepts any external reference voltage from
0.1V to VCC. With its extended input conversion range of
–12.5% VREF to 112.5% VREF, the LTC2420 smoothly
resolves the offset and overrange problems of preceding
sensors or signal conditioning circuits.
The LTC2420 communicates through a flexible 3-wire
digital interface which is compatible with SPI and
MICROWIRETM protocols.
, LTC and LT are registered trademarks of Linear Technology Corporation.
No Latency ∆Σ is a trademark of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
TYPICAL APPLICATIO
2.7V TO 5.5V
1µF
1
VCC
8
FO
REFERENCE
VOLTAGE
0.1V TO VCC
ANALOG
INPUT RANGE
–0.12VREF TO 1.12VREF
LTC2420
2 VREF
SCK 7
3 VIN
4 GND
SDO 6
CS 5
VCC
= INTERNAL OSC/50Hz REJECTION
= EXTERNAL CLOCK SOURCE
= INTERNAL OSC/60Hz REJECTION
3-WIRE
SPI INTERFACE
2420 TA01
Total Unadjusted Error vs Output Code
10
8
VCC = 5V
VREF = 5V
6 TA = 25°C
FO = LOW
4
2
0
–2
–4
–6
–8
–10
0
524,288
OUTPUT CODE (DECIMAL)
1,048,575
2420 TA02
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1
1 page  
LTC2420
PIN FUNCTIONS
VCC (Pin 1): Positive Supply Voltage. Bypass to GND
(Pin␣ 4) with a 10µF tantalum capacitor in parallel with
0.1µF ceramic capacitor as close to the part as possible.
VREF (Pin 2): Reference Input. The reference voltage range
is 0.1V to VCC.
VIN (Pin 3): Analog Input. The input voltage range is
– 0.125 • VREF to 1.125 • VREF. For VREF > 2.5V the input
voltage range may be limited by the pin absolute maxi-
mum rating of – 0.3V to VCC + 0.3V.
GND (Pin 4): Ground. Shared pin for analog ground,
digital ground, reference ground and signal ground. Should
be connected directly to a ground plane through a mini-
mum length trace or it should be the single-point-ground
in a single point grounding system.
CS (Pin 5): Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion, the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW on CS wakes up the ADC. A
LOW-to-HIGH transition on this pin disables the SDO
digital output. A LOW-to-HIGH transition on CS during the
Data Output transfer aborts the data transfer and starts a
new conversion.
SDO (Pin 6): Three-State Digital Output. During the data
output period this pin is used for serial data output. When
the chip select CS is HIGH (CS = VCC), the SDO pin is in a
high impedance state. During the Conversion and Sleep
periods, this pin can be used as a conversion status out-
put. The conversion status can be observed by pulling CS
LOW.
SCK (Pin 7): Bidirectional Digital Clock Pin. In Internal
Serial Clock Operation mode, SCK is used as digital output
for the internal serial interface clock during the data output
period. In External Serial Clock Operation mode, SCK is
used as digital input for the external serial interface. A
weak internal pull-up is automatically activated in Internal
Serial Clock Operation mode. The Serial Clock mode is
determined by the level applied to SCK at power up and the
falling edge of CS.
FO (Pin 8): Frequency Control Pin. Digital input that
controls the ADC’s notch frequencies and conversion
time. When the FO pin is connected to VCC (FO = VCC), the
converter uses its internal oscillator and the digital filter’s
first null is located at 50Hz. When the FO pin is connected
to GND (FO = OV) the converter uses its internal oscillator
and the digital filter first null is located at 60Hz. When FO
is driven by an external clock signal with a frequency fEOSC,
the converter uses this signal as its clock and the digital
filter first null is located at a frequency fEOSC/2560.
APPLICATIO S I FOR ATIO
The LTC2420 is pin compatible with the LTC2400. The two
devices are designed to allow the user to incorporate
either device in the same design with no modifications.
While the LTC2420 output word length is 24 bits (as
opposed to the 32-bit output of the LTC2400), its output
clock timing can be identical to the LTC2400. As shown in
Figure 1, the LTC2420 data output is concluded on the
falling edge of the 24th serial clock (SCK). In order to
maintain drop-in compatibility with the LTC2400, it is
possible to clock the LTC2420 with an additional 8 serial
clock pulses. This results in 8 additional output bits which
are always logic HIGH.
Output Data Format
The LTC2420 serial output data stream is 24 bits long. The
first 4 bits represent status information indicating the
sign, input range and conversion state. The next 20 bits are
the conversion result, MSB first.
Bit 23 (first output bit) is the end of conversion (EOC)
indicator. This bit is available at the SDO pin during the
conversion and sleep states whenever the CS pin is LOW.
This bit is HIGH during the conversion and goes LOW
when the conversion is complete.
Bit 22 (second output bit) is a dummy bit (DMY) and is
always LOW.
5
5 Page 
APPLICATIO S I FOR ATIO
Table 3. Typical Performance of the LTC2420 ADC When Used with the
LT1920 Instrumentation Amplifiers in Figure 9’s Differential Digitizing Circuit
PARAMETER
Differential Input Voltage Range
VS = ±5V
AV = 10
AV = 100
– 30 to 400
– 3 to 40
VS = ±15V
AV = 10
AV = 100
– 30 to 500
– 3 to 50
Zero Error
– 160
– 2650
– 213
– 2625
Maximum Input Current
2.0
Nonlinearity
±8.2 ±7.4 ±6.5 ±6.1
Noise (Without Averaging)
1.8* 0.25* 1.5* 0.27*
Noise (Averaged 64 Readings)
0.2*
0.03*
0.19*
0.03*
Resolution (with Averaged Readings)
21
20.6 21.3 20.5
Overall Accuracy (Uncalibrated)
17.2 17.3 17.5 18.2
Common Mode Rejection Ratio
≥120
Common Mode Range
2/–1.5**
2.2/–1.7**
11.5/–11**
11.7/–11.2**
*Input referred noise for the respective gain. **Typical values based on single lab tested sample of each amplifier.
Table 4. Typical Performance of the LTC2420 ADC When Used with the
LT1167 Instrumentation Amplifiers in Figure 9’s Differential Digitizing Circuit
PARAMETER
Differential Input Voltage Range
VS = ±5V
AV = 10
AV = 100
– 30 to 400
– 3 to 40
VS = ±15V
AV = 10
AV = 100
– 30 to 500
– 3 to 50
Zero Error
–94
– 1590
– 110
– 1470
Maximum Input Current
0.5
Nonlinearity
±4.1 ±4.4 ±4.1 ±3.7
Noise (Without Averaging)
1.4* 0.19* 1.5* 0.18*
Noise (Averaged 64 Readings)
0.18*
0.02*
0.19*
0.02*
Resolution (with Averaged Readings)
21.4
21.0
21.3
21.1
Overall Accuracy (Uncalibrated)
18.2 18.1 18.2 19.4
Common Mode Rejection Ratio
≥120
Common Mode Range
2/–1.5**
2.2/–1.7**
11.5/–11**
11.7/–11.2**
*Input referred noise for the respective gain. **Typical values based on single lab tested sample of each amplifier.
LTC2420
TOTAL (UNITS)
mV
µV
nA
ppm
µVRMS
µVRMS
Bits
Bits
dB
V
TOTAL (UNITS)
mV
µV
nA
ppm
µVRMS
µVRMS
Bits
Bits
dB
V
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LTC2420C.PDF ] | |
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