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PDF LTC1799 Data sheet ( Hoja de datos )

Número de pieza LTC1799
Descripción 1kHz to 33MHz Resistor Set SOT-23 Oscillator
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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No Preview Available ! LTC1799 Hoja de datos, Descripción, Manual

LTC1799
1kHz to 33MHz
Resistor Set SOT-23 Oscillator
Features
Description
n One External Resistor Sets the Frequency
n Fast Start-Up Time: <1ms
n 1kHz to 33MHz Frequency Range
n Frequency Error ≤1.5% 5kHz to 20MHz
(TA = 25°C)
n Frequency Error ≤2% 5kHz to 20MHz
(TA = 0°C to 70°C)
n ±40ppm/°C Temperature Stability
n 0.05%/V Supply Stability
n 50% ±1% Duty Cycle 1kHz to 2MHz
n 50% ±5% Duty Cycle 2MHz to 20MHz
n 1mA Typical Supply Current
n 100Ω CMOS Output Driver
n Operates from a Single 2.7V to 5.5V Supply
n Low Profile (1mm) SOT-23 (ThinSOT™ Package)
Applications
n Low Cost Precision Oscillator
n Charge Pump Driver
n Switching Power Supply Clock Reference
n Clocking Switched Capacitor Filters
n Fixed Crystal Oscillator Replacement
n Ceramic Oscillator Replacement
n Small Footprint Replacement for Econ Oscillators
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners. Protected by U.S. Patents including 6342817 and 6614313.
The LTC®1799 is a precision oscillator that is easy to use
and occupies very little PC board space. The oscillator
frequency is programmed by a single external resistor
(RSET). The LTC1799 has been designed for high accuracy
operation (≤1.5% frequency error) without the need for
external trim components.
The LTC1799 operates with a single 2.7V to 5.5V power
supply and provides a rail-to-rail, 50% duty cycle square
wave output. The CMOS output driver ensures fast rise/
fall times and rail-to-rail switching. The frequency-setting
resistor can vary from 3k to 1M to select a master oscil-
lator frequency between 100kHz and 33MHz (5V supply).
The three-state DIV input determines whether the master
clock is divided by 1, 10 or 100 before driving the out-
put, providing three frequency ranges spanning 1kHz to
33MHz (5V supply). The LTC1799 features a proprietary
feedback loop that linearizes the relationship between RSET
and frequency, eliminating the need for tables to calculate
frequency. The oscillator can be easily programmed using
the simple formula outlined below:
fOSC
=
10MHz

N
10k
RSET

,
N
=
100,
10,
1,
DIV
DIV
DIV
Pin
Pin
Pin
=
=
=
V+
Open
GND
Typical Application
Basic Connection
5V
3k ≤ RSET ≤ 1M
0.1µF
1 V+
1kHz ≤ fOSC ≤ 33MHz
5
OUT
2
LTC1799
GND
3 SET DIV 4
5V
÷100
÷10
OPEN
1799 TA01
÷1
Typical Distribution of Frequency Error,
TA = 25°C (5kHz ≤ fOSC ≤ 20MHz, V+ = 5V)
25
20
15
10
5
TSOT-23 Actual Size
0
–1.25
–0.75 –0.25 0 0.25 0.75 1.25
FREQUENCY ERROR (%)
1799 TA02
1799fc
1

1 page




LTC1799 pdf
LTC1799
Pin Functions
V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This sup-
ply must be kept free from noise and ripple. It should be
bypassed directly to a ground plane with a 0.1µF capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane
for best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V+ deter-
mines the oscillator frequency. The voltage on this pin is
held by the LTC1799 to approximately 1.13V below the
V+ voltage. For best performance, use a precision metal
film resistor with a value between 10k and 200k and limit
the capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the
value of N in the frequency equation. Pin 4 should be tied
to GND for the ÷1 setting, the highest frequency range.
Floating Pin 4 divides the master oscillator by 10. Pin 4
should be tied to V+ for the ÷100 setting, the lowest fre-
quency range. To detect a floating DIV pin, the LTC1799
attempts to pull the pin toward midsupply. This is realized
with two internal current sources, one tied to V+ and Pin
4 and the other one tied to ground and Pin 4. Therefore,
driving the DIV pin high requires sourcing approximately
5µA. Likewise, driving DIV low requires sinking 5µA.
When Pin 4 is floated, preferably it should be bypassed
by a 1nF capacitor to ground or it should be surrounded
by a ground shield to prevent excessive coupling from
other PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5kΩ
and/or 10pF loads. Larger loads may cause inaccuracies
due to supply bounce at high frequencies. Transients will
not cause latchup if the current into/out of the OUT pin is
limited to 50mA.
Block Diagram
1 V+
RSET
IRES 3 SET
+– VBIAS
VRES(V=+1–.1V3SVET±)25%
+
GAIN = 1
MASTER OSCILLATOR
ƒMO
=
100MHz
(V+
IRES
– VSET)
2 GND
IRES
PROGRAMMABLE
DIVIDER
(÷1, 10 OR 100)
DIVIDER
SELECT
THREE-STATE
INPUT DETECT
OUT 5
V+
5µA
DIV 4
5µA
GND
1799 BD
1799fc
5

5 Page





LTC1799 arduino
LTC1799
Typical Application
3V
C1
0.1µF
Low Power 80Hz to 8kHz Sine Wave Generator (IQ < 4mA)
1
RSET 2
3
V+ OUT
LTC1799
GND
SET DIV
5 fOSC
3V
3V, N = 100
SW1
4 OPEN, N = 10
74HC4520
3V
C2
0.1µF
800Hz ≤ fSINE 8kHz, N = 10
80Hz ≤ fSINE 800Hz, N = 100
1 CLOCK A
2 ENABLE A
16 VDD
10 ENABLE B
7 RESET A
8 VSS
9 CLOCK B
15 RESET B
Q1A 3 ÷2
Q2A 4 ÷4
Q3A 5 ÷8
Q4A 6 ÷16
Q1B 11 ÷32
Q2B 12 ÷64
Q3B 13 ÷128
Q4B 14 ÷256
C4
1µF
R11
100k
fOSC
64
3V
C3
0.1µF
R61
10k
R51 5.11k
R31 51.1k
R21 20k
LTC1067-50
1 V+
CLK 16
2 NC
3 V+
AGND 15
V14
R62 14k
4 SA
5 LPA
6 BPA
7 HPA/NA
SB
LPB
BPB
HPB/NB
13
12
11
10
R52
5.11k
R32 51.1k
SINEWAVE
OUT
fSINE
=
10MHz
N
10k
64RSET
8 INV A
INV B 9 R22 20k
RH1 249k
RL1 51.1k
1799 TA05
CLOCK-TUNABLE LOWPASS FILTER WITH
A STOPBAND NOTCH AT THE 3rd HARMONIC
( )fOSC
64
3
1799fc
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