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PDF LTC1520CS Data sheet ( Hoja de datos )

Número de pieza LTC1520CS
Descripción 50Mbps Precision Quad Line Receiver
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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No Preview Available ! LTC1520CS Hoja de datos, Descripción, Manual

FEATURES
s Precision Propagation Delay: 18ns ±3ns Over
Temperature
s Data Rate: 50Mbps
s Low tPLH/tPHL Skew: 500ps Typ
s Low Channel-to-Channel Skew: 400ps Typ
s Rail-to-Rail Input Common Mode Range
s High Input Resistance: 18k, Even When Unpowered
s Hot Swap Capable
s Can Withstand Input DC Levels of ±10V
s Short-Circuit Protected
s Single 5V Supply
s LVDS Compatible
s Will Not Oscillate with Slow Input Signals
U
APPLICATIONS
s High Speed Backplane Interface
s Line Collision Detector
s PECL and LVDS Line Receivers
s Level Translator
s Ring Oscillator
s Tapped Delay Line
, LTC and LT are registered trademarks of Linear Technology Corporation.
Final Electrical Specifications
LTC1520
50Mbps Precision Quad
Line Receiver
DESCRIPTION
May 1996
The LTC®1520 is a high speed, precision differential line
receiver that can operate at data rates as high as 50Mbps.
A unique architecture provides very stable propagation
delays and low skew over a wide input common mode,
input overdrive and ambient temperature range. Propaga-
tion delay is 18ns ±3ns, while typically tPLH/tPHL skew is
500ps and channel-to-channel skew is 400ps.
Each receiver translates differential input levels (VID
100mV) into valid CMOS and TTL output levels. Its high
input resistance (18k) allows many receivers to be con-
nected to the same driver. The receiver outputs go into a
high impedance state when disabled.
Protection features include thermal shutdown and a con-
trolled maximum short-circuit current (50mA max) that
does not oscillate in and out of short-circuit mode. Input
resistance remains 18k when the device is unpowered or
disabled, thus allowing the LTC1520 to be hot swapped into
a backplane without loading the data lines.
The LTC1520 operates from a single 5V supply and draws
12mA of supply current. The part is available in a 16-lead
narrow SO package.
TYPICAL APPLICATION
High Speed Backplane Receiver
LTC1520
+
+–
–+
+
Propagation Delay Guaranteed to Fall
Within Shaded Area (±3ns)
VIN =
1V/DIV
VOUT =
5V/DIV
RECEIVER
OUTPUT
VDD = 5V
RECEIVER
INPUT
VID = 500mV
5V – 5 0 5 10 15 20 25 30 35 40 45
3.3k TIME (ns)
LTC1520 TA02
3.3k 0.01µF
LTC1520 TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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LTC1520CS pdf
UW
W
SWITCHI G TI E WAVEFOR S
3V
ENABLE
0V
5V
OUT 1
VOL
VOH
OUT 1
0V
1.5V
t ZL
OUTPUT
1.5V NORMALLY LOW
1.5V
t LZ
0.2V
1.5V OUTPUT
NORMALLY HIGH
t ZH
t HZ
0.2V
RECEIVER
OUTPUT
S1
CL 1k S2
1k
VDD
1520 F02
Figure 2. Receiver Enable and Disable Timing
Test Circuit and Waveforms
LTC1520
INPUT
A1, A2
3V
B1, B2 = 2.5V
2V
CH1 OUT
tCH-CH
VDD/2
VDD/2
tCH-CH
CH2 OUT
VDD/2
VDD/2
1520 F03
Figure 3. Any Channel to Any Channel Skew, Same Package
INPUT
A1, B1
VID = 500mV
SAME INPUT FOR BOTH PACKAGES
PACKAGE 1
OUT 1
PACKAGE 2
OUT 1
tPKG-PKG
tPKG-PKG
1520 F04
Figure 4. Package-to-Package Propagation Delay Skew
UU
EQUIVALE T I PUT NETWORKS
18k
A
3.3V
18k
B
3.3V
18k
A
18k
B
RECEIVER ENABLED, VDD = 5V
RECEIVER DISABLED OR VDD = 0V
1520 F05
Figure 5. Input Thevenin Equivalent
APPLICATIONS INFORMATION
Theory of Operation
Unlike typical line receivers whose propagation delay can
vary by as much as 500% from package to package and
show significant temperature drift, the LTC1520 employs
a novel architecture that produces a tightly controlled and
temperature compensated propagation delay. The differ-
ential timing skew is also minimized between rising and
falling output edges, and the propagation delays of any
two receivers within a package are very tightly matched.
The precision timing features of the LTC1520 reduce
overall system timing constraints by providing a narrow
6ns window during which valid data appears at the re-
ceiver output. This output timing window applies to all
receivers in all packages over all operating temperatures
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