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PDF AN5491K Data sheet ( Hoja de datos )
| Número de pieza | AN5491K | |
| Descripción | Synchronous signal and deflection distortion correction processing IC supporting I2C bus for HD/ wide television | |
| Fabricantes | Panasonic Semiconductor | |
| Logotipo |  |
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ICs for TV
AN5491K
Synchronous signal and deflection distortion correction processing IC
supporting I2C bus for HD, wide television
s Overview
The AN5491K is a deflection processor IC for syn-
chronous signal processing and screen distortion correc-
tion. It synchronizes with the input signal of High-vision,
wide television, NTSC, PAL and VGA by the external
binary input signal of them so that a multimedia television
can be realized easily.
s Features
• Supports the multiple-point horizontal frequency
(15.7 kHz to 62.7 kHz)
• Horizontal duty is controllable by external voltage.
• Built-in full functions for correction
(Horizontal and vertical: 16 items)
• Over-current detection, shut-down and hold-down
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
3° to 15°
13.7±0.3
15.3±0.25
Unit: mm
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
0.96±0.25
3.3±0.25
4.76±0.25
0.3+–00..105
SDIP042-P-0600A
s Applications
• High-vision televisions, Wide screen televisions and
Projection televisions
1
1 page  
ICs for TV
AN5491K
s Electrical Characteristics at Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min Typ Max Unit
Deflection correction processing
VP pulse for OSD low-level
VP pulse for OSD high-level
EHT-AC input pin voltage
Vertical input signal threshold voltage
Vertical free-running oscillation
frequency
VLOSD
VHOSD
V24
VTFV
fVO
VCC1 = 5 V, VCC2 = 9 V
VCC1 = 5 V, VCC2 = 9 V
Pin 24: Open
Pin 16: Input
Pin 16: Without input
external R = 10 kΩ, C = 3.3 µF
0 0.4
2.2 2.75 3.3
2.00 2.45 2.90
0.9 1.5 2.1
35 44 53
V
V
V
V
Hz
Typical vertical output amplitude
Typical EW output amplitude
VV V amplitude DAC: Typ.
0.88 1.10 1.32 V[p-p]
VEW EW output amplitude for typical ver- 0.8 1.0 1.2 V[p-p]
tical output amplitude = 1.25 V[p-p]
Phase out amplitude
Ramp waveform amplitude
AGC input and output current
Service SW: ON time
Vertical output DC
VPHASE
VRAMP
IAGC
V28SW
Side pin parallel, DAC: Typ.
fV = 50 Hz to 120 Hz
− 0.1 0 0.1 V[p-p]
2.15 2.45 2.75 V[p-p]
1.6 2.0 2.4 mA
3.1 3.5 3.9 V
BLK pulse high-level
BLK pulse low-level
Vertical output amplitude
variable ratio (max.)
VHBLK
VLBLK
∆VAMPmax V amplitude ratio between
typ. → max.
4.5 5.0 5.5
0 0.4
+40 +50 +60
V
V
%
Vertical output amplitude
variable ratio (min.)
∆VAMPmin V amplitude ratio between
typ. → max.
−40 −50 −60 %
Vertical output DC variable amount (min.) ∆VSHIFTmin Vertical DC: Typ. → min.
− 0.28 − 0.38 − 0.48
Vertical output DC variable amount (max.) ∆VSHIFTmax Vertical DC: Typ. → max.
+0.28 +0.38 +0.48
Vertical output trapezoidal waveform ∆VTRAPmin Trapezoidal waveform correction: − 0.28 − 0.38 − 0.48
correction variable amount (min.)
Typ. → min.
V
V
V
Vertical output trapezoidal waveform ∆VTRAPmin Trapezoidal waveform correction: +0.28 +0.38 +0.48
correction variable amount (max.)
Typ. → max.
V
External trapezoidal waveform
center voltage
V21
2.4 3.0 3.6 V
Vertical output center DC level
EW output (min.) to parabolic
amplitude change
V28
VEWmin Parabolic amplitude: Min.
2.8 3.5
− 0.1 0
4.2 V
0.1 V[p-p]
EW output (max.) to parabolic
amplitude change
VEWmax Parabolic amplitude: Max.
1.4 1.8 2.2 V[p-p]
EW output (min.) (DC)
to horizontal amplitude change
∆VEWmin Horizontal amplitude: Min.
− 0.95 −1.15 −1.35 V
EW output (max.) (DC)
to horizontal amplitude change
∆VEWmax Horizontal amplitude: Max.
+0.95 +1.15 +1.35 V
EW output (bottom voltage) 1
to EHT-DC change
∆VEDC1 EHT-DC: 5.0 V → 3.8 V
Horizontal EHT: Max.
EHT-AC gain: Min.
+1.04 +1.30 +1.56 V
5
5 Page 
ICs for TV
AN5491K
s Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
10
9V
Description
Lower side slice:
Lower side slice voltage input pin for BLK
Pulse generation
Voltage
DC
10
20 kΩ
145 Ω
Lower side
BLK
11
V-SAW in:
AC
9 V V-SAW input pin for BLK pulse generation
25 µA
11
20 kΩ
145 Ω
12 VCC:
DC
Power supply (5 V) pin for DAC/I2L
5V
• Connect a pass capacitor (0.01 µF) between
pin 12 and GND (pin 19).
13 5 V SDA:
I2C data input pin
20 µA
5V
13
1 kΩ
GND
14 5 V SCL:
I2C clock input pin
20 µA
14
1 kΩ
5V
GND
15 VCC:
DC
Pin for deflection system power supply (9 V)
9V
• Connect a pass capacitor between the pin
and GND.
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet AN5491K.PDF ] | |
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