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Número de pieza | AN8539SH | |
Descripción | 300 MHz-band single PLL IC | |
Fabricantes | Panasonic Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de AN8539SH (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
No Preview Available ! ICs for Mobile Communication
AN8539SH
300 MHz-band single PLL IC
s Overview
The AN8539SH is a 300 MHz-band, 2nd local
OSC PLL IC designed for a cellular phone which
allows IF switching to high or low.
s Features
• To be switched to two frequencies.
(Select by SELECT pin.)
• Analog SW built-in
• ICC = 900 µA
s Applications
• Cellular phone
1
5
0.5±0.2
10
6
4.3±0.30
6.3±0.30
SSOP010-P-0225
Unit: mm
s Block Diagram
Lock detection
14-bit R counter
15-bit N counter
Phase comparator
Selector
1/16, 1/17 prescaler
1
1 page ICs for Mobile Communication
s Application Notes (continued)
1. Input level characteristics (continued)
2) REF input level characteristics
20 Upper limit
10
VCC = 2.55 V to 3.3V
Ta = −30°C, 25°C, 85°C
AN8539SH
0
Lower limit
Ta = 25°C
−10
Ta = −30°C
−20 Ta = 85°C
−30
0
5 10 15 20 25
Input frequency (MHz)
30
2. Characteristics specification
1) IF select specification
SELECT pin control enables you to switch IF as below:
SELECT = low → fOUT = 129.55 MHz, fR = 50 kHz (P = 16, N = 161, A = 15, R = 256)
SELECT = high → fOUT = 178 MHz, fR = 400 kHz (P = 16, N = 27, A = 13, R = 32)
2) Unlock detection and LD output specification
LD output is high in a lock mode and low in an unlock mode. Lock signal is outputted in a power save mode.
SELECT = high : Detection time is 2.6 µs. About detection accuracy, when a dividing output shifts
by ±(78 × 3) ns for fREF = 400 kHz, it generates an unlock output.
SELECT = low : Detection time is 20 µs. About detection accuracy, when a dividing output shifts
by ±(78 × 3) ns for fREF = 50 kHz, it generates an unlock output.
3) Power save control specification
When power save control pin (PS) is high, it is set to an operating mode. When it is low, it is set to power save mode.
4) Analog SW control specification
CPSUB is controlled by SW pin.
SW = low : CPSUB open
SW = high: CPSUB operation
5) Other specification
Set CMOS input pins, such as PS pin, SW pin, SELECT pin, etc., normally to VCC or GND.
5
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet AN8539SH.PDF ] |
Número de pieza | Descripción | Fabricantes |
AN8539SH | 300 MHz-band single PLL IC | Panasonic Semiconductor |
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