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PDF AT28C16 Data sheet ( Hoja de datos )
| Número de pieza | AT28C16 | |
| Descripción | 16K 2K x 8 CMOS E2PROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Fast Read Access Time - 150 ns
• Fast Byte Write - 200 µs or 1 ms
• Self-Timed Byte Write Cycle
– Internal Address and Data Latches
– Internal Control Timer
– Automatic Clear Before Write
• Direct Microprocessor Control
– DATA POLLING
• Low Power
– 30 mA Active Current
– 100 µA CMOS Standby Current
• High Reliability
– Endurance: 104 or 105 Cycles
– Data Retention: 10 Years
• 5V ± 10% Supply
• CMOS & TTL Compatible Inputs and Outputs
• JEDEC Approved Byte Wide Pinout
• Commercial and Industrial Temperature Ranges
Description
The AT28C16 is a low-power, high-performance Electrically Erasable and Program-
mable Read Only Memory with easy to use features. The AT28C16 is a 16K memory
organized as 2,048 words by 8 bits. The device is manufactured with Atmel’s reliable
nonvolatile CMOS technology.
(continued)
Pin Configurations
Pin Name
A0 - A10
CE
OE
WE
I/O0 - I/O7
NC
DC
Function
Addresses
Chip Enable
Output Enable
Write Enable
Data Inputs/Outputs
No Connect
Don’t Connect
PLCC
Top View
A6 5
A5 6
A4 7
A3 8
A2 9
A1 10
A0 11
NC 12
I/O0 13
29 A8
28 A9
27 NC
26 NC
25 OE
24 A10
23 CE
22 I/O7
21 I/O6
PDIP, SOIC
Top View
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 A8
22 A9
21 WE
20 OE
19 A10
18 CE
17 I/O7
16 I/O6
15 I/O5
14 I/O4
13 I/O3
16K (2K x 8)
Parallel
EEPROMs
AT28C16
Note: PLCC package pins 1 and 17
are DON’T CONNECT.
Rev. 0540B–10/98
1
1 page  
AC Read Characteristics
Symbol
tACC
tCE(1)
tOE(2)
tDF(3)(4)
tOH
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
CE or OE High to Output Float
Output Hold from OE, CE or Address, whichever occurred first
AC Read Waveforms(1)(2)(3)(4)
AT28C16
AT28C16-15
Min Max
150
150
10 70
0 50
0
Units
ns
ns
ns
ns
ns
Notes:
1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change
without impact on tACC.
3. tDF is specified from OE or CE whichever occurs first (CL = 5 pF).
4. This parameter is characterized and is not 100% tested.
Input Test Waveforms and
Measurement Level
Output Test Load
tR, tF < 20 ns
Pin Capacitance
f = 1 MHz, T = 25°C(1)
Symbol
Typ
Max
CIN
COUT
Note:
46
8 12
1. This parameter is characterized and is not 100% tested.
Units
pF
pF
Conditions
VIN = 0V
VOUT = 0V
5
5 Page 
AT28C16
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AT28C16.PDF ] | |
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