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PDF CXP87248A Data sheet ( Hoja de datos )
| Número de pieza | CXP87248A | |
| Descripción | CMOS 8-bit Single Chip Microcomputer | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXP87240A/87248A
CMOS 8-bit Single Chip Microcomputer
Description
The CXP87240A/87248A is a CMOS 8-bit micro-
computer which consists of A/D converter, serial
interface, timer/counter, time base timer, vector
interruption, high precision timing pattern generation
circuit, PWM generator, PWM for tuner, VISS/VASS
circuit, 32kHz timer/event counter, remote control
receiving circuit, general purpose prescaler, HSYNC
counter, VCR vertical sync separation circuit and the
measuring circuit which measure signals of capstan
FG and drum FG/PG and other servo systems, as
well as basic configurations like 8-bit CPU, ROM,
RAM and I/O port. They are integrated into a single
chip.
Also CXP87240A/87248A provides sleep/stop
function which enables to lower power consumption
and ultra-low speed instruction mode in 32kHz
operation.
100 pin QFP (PIastic) 100 pin LQFP (PIastic)
Structure
Silicon gate CMOS IC
Features
• A wide instruction set (213 instructions) which cover various types of data
— 16-bit arithmetic instruction/multiplication and division instructions/boolean bit operation instruction
• Minimum instruction cycle
During operation 333ns/12MHz (3.0 to 5.5V)
During operation 250ns/16MHz (4.5 to 5.5V)
During operation 122µs/32kHz
• Incorporated ROM capacity 40Kbytes (CXP87240A), 48Kbytes (CXP87248A)
• Incorporated RAM capacity 1376bytes
• Peripheral functions
— A/D converter
8-bit, 12-channel, successive approximation system
(Conversion time 20.0µs/16MHz)
— Serial interface
Incorporated buffer RAM (1 to 32 bytes auto transfer) 1-channel
Incorporated 8-bit and 8-stage FIFO
(1 to 8 bytes auto transfer) 1-channel
— Timer
8-bit timer, 8-bit timer/counter, 19-bit time base timer,
32kHz timer/counter
— High precision timing pattern generator PPG 19-pin 32-stage programmable
RTG 5-pin 2-channel
— PWM/DA gate output
PWM 12-bit, 2-channel (Repetitive frequency 62kHz/16MHz)
DA gate pulse output 13-bit, 4-channel
— Servo input control
Capstan FG, Drum FG/PG, CTL input
— VSYNC separator
— FRC capture unit
Incorporated 26-bit and 8-stage FIFO
— PWM output
14-bit, 1-channel
— VISS/VASS circuit
Pulse duty auto detection circuit
— Remote control receiving circuit
8-bit pulse measuring counter, 6-stage FIFO
— General purpose prescaler
7-bit (SYNC1 input frequency divided, FRC capture possible)
— HSYNC counter
12-bit event counter (counts the SYNC1 input.)
• Interruption
22 factors, 15 vectors, multi-interruption possible
• Standby mode
SLEEP/STOP
• Package
100-pin plastic QFP/LQFP
• Piggyback/evaluation chip
CXP87200A 100-pin ceramic QFP/LQFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E94833-ST
1 page  
CXP87240A/87248A
Pin Description
Symbol
I/O
Description
PA0/PPO0
to
PA7/PPO7
Output/
Real time
output
PB0/PPO8
to
PB7/PPO15
Output/
Real time
output
PC0/PPO16
to
PC2/PPO18
PC3/RTO3
to
PC7/RTO7
I/O/
Real time
output
I/O/
Real time
output
PD0 to PD7 I/O
(Port A)
8-bit output port. Data is
gated with PPO contents by
OR-gate and they are output.
(8 pins)
(Port B)
8-bit output port. Data is
gated with PPO contents by
OR-gate and they are output.
(8 pins)
Programmable pattern generator (PPG)
output.
Functions as high precision real time
pulse output port.
(19 pins)
PB0 and PB2 can be 3-state controlled
with PPG.
(Port C)
8-bit I/O port, enables to
specify I/O by bit unit.
Data is gated with PPO or
RTO contents by OR-gate
and they are output.
(8 pins)
Real time pulse generator (RTG) output.
Functions as high precision real time
pulse output port. (5 pins)
(Port D)
8-bit I/O port. Enable to specify I/O by 4-bit unit.
Enables to drive 12mA sink current.
(8 pins)
PE0/INT0/
CKOUT
PE1/EC/INT2/
HCOUT
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
Input/Input/Output
Input/Input/Input/
Output
Output/Output
Output/Output
Output/Output
Output/Output
Output/Output
(Port E)
8-bit port.
Lower 2 bits
are input
pins and
upper 6 bits
are output
pins.
(8 pins)
Input pin to request external interruption.
Active when falling edge.
PC3 can be 3-state controlled with RTG.
System clock frequency division output.
External event Input pin to request
Coincidence signal
input pin for external interruption.
output pin for
timer/counter. Active when falling edge. HSYNC counter.
PWM output pins.
(2 pins)
DA gate pulse output pins.
(4 pins)
PE7/DAB1 Output/Output
AN0 to AN3 Input
Analog input pins to A/D converter. (12 pins)
PF0/AN4
to
PF3/AN7
PF4/AN8
to
PF7/AN11
Input/Input
Output/Input
(Port F)
Lower 4 bits are input port and upper 4 bits are output port.
Lower 4 bits also serve as standby release input pin.
(8 pins)
SCK0
I/O
Serial clock (CH0) I/O pin.
SO0
Ouput
Serial data (CH0) output pin.
SI0 Input
Serial data (CH0) input pin.
CS0 Input
Serial chip select (CH0) input pin.
–5–
5 Page 
CXP87240A/87248A
Pin
PF4/AN8
to
PF7/AN11
4 pins
PG0/CFG
PG1/DFG
PG2/DPG
PG3/PBCTL
PG4/SYNC0
PG5/SYNC1
PG6/EXI0
PG7/EXI1
8 pins
PH0
to
PH7
8 pins
PI2/PWM
PI3/TO/
DDO/ADJ
2 pins
Port F
Circuit format
When reset
Port F data
Data bus
RD
(Port F)
Port/AD select
IP A/D
converter
Input multiplexer
Port G
Schmitt input
IP Servo input
Data bus
RD (Port G)
Note) For PG4/SYNC0, PG5/SYNC1, CMOS schmitt input and TTL schmitt
input can be selected with the mask option.
Hi-Z
Hi-Z
Port H
Port H data
Data bus
RD (Port H)
Port I
Port I function
select
PI2: From 14-bit PWM
PI3: From timer/counter,
CTL duty detection circuit,
32kHz timer
Port I data
Port I direction
Data
bus
RD (Port I)
MPX
Medium withstand
voltage 12V
High current
12mA
IP
Hi-Z
Hi-Z
– 11 –
11 Page | ||
| Páginas | Total 32 Páginas | |
| PDF Descargar | [ Datasheet CXP87248A.PDF ] | |
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