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PDF CXP85224A Data sheet ( Hoja de datos )
| Número de pieza | CXP85224A | |
| Descripción | CMOS 8-bit Single-chip Microcomputer | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXP85112B/85116B
CXP85220A/85224A/85228A/85232A
CMOS 8-bit Single-chip Microcomputer
Description
The CXP85112B/85116B, CXP85220A/85224A/
85228A/85232A is a CMOS 8-bit single chip
microcomputer integrating on a single chip an A/D
converter, serial interface, timer/counter, time base
timer, vector interruption, on-screen display function,
I2C bus interface, PWM generator, remote control
reception circuit, HSYNC counter, power source
frequency counter and watch dog timer besides the
basic configurations of 8-bit CPU, ROM, RAM, and
l/O port.
The CXP85112B/85116B, CXP85220A/85224A/
85228A/85232A also provides a power-on reset
function and a sleep function that enables lower
power consumption.
64 pin SDIP (Plastic)
Structure
Silicon gate CMOS IC
64 pin QFP (Plastic)
Features
• Wide-range instruction system (213 instructions) to cover various types of data
— 16-bit arithmetic/multiplication and division/boolean bit operation instructions
• Minimum instruction cycle
1µs at 4MHz operation
• Incorporated ROM capacity
12K bytes (CXP85112B)
16K bytes (CXP85116B)
20K bytes (CXP85220A)
24K bytes (CXP85224A)
28K bytes (CXP85228A)
32K bytes (CXP85232A)
• Incorporated RAM capacity
352 bytes (CXP85112B/85116B)
448 bytes (CXP85220A/85224A/85228A/85232A)
• Peripheral functions
— On-screen display function
12 × 16 dots, 128 types
21 words × 4 Iines (more than 4 Iines possible)
Double scan mode compatible, jitter elimination circuit
— I2C bus interface
— PWM output
14 bits, 1 channel
6 bits, 8 channels
— Remote control reception circuit 8-bit pulse measurement counter with on-chip 6-stage FIFO
— A/D converter
4 bits, 4channels, successive approximation method
(Conversion time of 40µs/4MHz)
— HSYNC counter
— Power supply frequency counter
— Watch dog timer
— Serial I/O
8-bit clock synchronization
— Timer
8-bit timer, 8-bit timer/counter, 19-bit time base timer
• Interruption
14 factors, 14 vectors, multi-interruption possible
• Standby mode
Sleep
• Package
64-pin plastic SDIP/QFP
• Piggyback/evaluation chip
CXP85100A, CXP85190 (Custom font compatible)
CXP85200A, CXP85290 (Custom font compatible)
Purchase of Sony's I2C components conveys a license under the Philips I2C Patent Rights to use these components
in an I2C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E93Z17B86
1 page  
CXP85112B/85116B, CXP85220A/85224A/85228A/85232A
Pin Description
Symbol
PA0 to PA7
PB0 to PB7
PC0 to PC7
PD0/INT2
PD1/SCK
PD2/SO
PD3/SI
PD4/HSI
PD5/ACI
PD6/RMC
PD7/EC
PE0/INT0
PE1/INT1
PE2/AN0
to
PE5/AN3
PE6/PWM
PE7/TO
PF0/PWM0
to
PF3/PWM3
PF4/PWM4/
SCL0
PF5/PWM5/
SCL1
PF6/PWM6/
SDA0
PF7/PWM7/
SDA1
R, G, B, BLK
HSYNC
VSYNC
I/O
I/O
I/O
I/O
I/O/Input
I/O/I/O
I/O/Output
I/O/Input
I/O/Input
I/O/Input
I/O/Input
I/O/Input
Input/Input
Input/Input
Output/Output
Output/Output
Output/Output
Output/Output/
I/O
Output/Output/
I/O
Output
Input
Input
Description
(Port A)
8-bit I/O port. I/O can be set in a unit of single bits.
(8 pins)
(Port B)
8-bit I/O port. I/O can be set in a unit of single bits.
(8 pins)
(Port C)
8-bit I/O port. I/O can be set in a unit of single bits.
(8 pins)
External interruption request input.
Active at falling edge.
(Port D)
8-bit I/O port.
I/O can be set ina a
unit of single bits.
Capable of driving
12mA sink current.
(8 pins)
Serial clock I/O.
Serial data output.
Serial data input.
HSYNC counter input.
Input for power supply frequency counter.
Input for remote control reception circuit.
External event input for timer/counter.
External interruption request inputs.
Active at falling edge.
(2 pins)
(Port E)
Analog inputs for A/D converter.
8-bit port. Lower
(4 pins)
6 bits are for inputs;
upper 2 bits are for 14-bit PWM output.
outputs.
(CMOS output)
Rectangular waveform output for Timer 1.
(Duty output 50%)
(Port F)
8-bit output port,
operating as N-ch
open drain output
for high current
(12mA).
Lower 4 bits are
medium voltage
drive outputs (12V),
upper 4bits are 5V
drive outputs.
(8 pins)
6-bit PWM outputs.
(8 pins)
Transfer clock I/Os for I2C bus
interface.
Transfer data I/Os for I2C data bus.
4-bit outputs for CRT display.
Horizontal synchronizing signal input for CRT display.
Vertical synchronizing signal input for CRT display.
–5–
5 Page 
CXP85112B/85116B, CXP85220A/85224A/85228A/85232A
Electrical Characteristics
DC Characteristics
(Ta = –20 to +75°C, Vss = 0V reference)
Item
High level output
current
Symbol
Pins
Conditions
Min. Typ. Max. Unit
VOH
PA to PD, PE6, PE7, VDD = 4.5V, IOH = –0.5mA
R, G, B, BLK
VDD = 4.5V, IOH = –1.2mA
4.0
3.5
V
V
PA to PD, PE6, PE7, VDD = 4.5V, IOL = 1.8mA
R, G, B, BLK,
PF0 to PF3, RST∗1 VDD = 4.5V, IOL = 3.6mA
Low level output
current
VOL
PD, PF0 to PF3
VDD = 4.5V, IOL = 12.0mA
PF4 to PF7
(SCL0, SCL1,
VDD = 4.5V, IOL = 3.0mA
SDA0, SDA1)
VDD = 4.5V, IOL = 4.0mA
0.4 V
0.6 V
1.5 V
0.4 V
0.6 V
Input current
IIHE
EXTAL
IIHL
IILR RST∗2
VDD = 5.5V, VIH = 5.5V
VDD = 5.5V, VIL = 0.4V
VDD = 5.5V, VIL = 0.4V
0.5
–0.5
–1.5
40
–40
–400
µA
µA
µA
I/O leakage current IIZ
PA to PE, HSYNC,
VSYNC, R, G, B,
BLK, RST∗2, MP
VDD = 5.5V
VI = 0, 5.5V
±10 µA
Open drain output
leakage current
ILOH
(N-ch Tr in off state)
PF0 to PF3
PF4 to PF7
VDD = 5.5V, VOH = 12.0V
VDD = 5.5V, VOH = 5.5V
50 µA
10 µA
Impedance connected
to I2C bus switch
RBS
(output Tr in off state)
SCL0: SCL1
SDA0: SDA1
IDD
Power supply current
VDD∗3
VDD = 4.5V
VSCL0 = VSCL1 = 2.25V
VSDA0 = VSDA1 = 2.25V
Operation mode∗3
(1/2 frequency
demultiplier clock)
4MHz crystal oscillation
(C1 = C2 = 22pF)
All outputs open
120 Ω
8 20 mA
IDDSL
IDDST
Sleep mode
Stop mode∗4
0.5 2 mA
— — — µA
Input capacity
CIN
Pins other than
VDD and Vss
Clock 1MHz
0V for all pins excluding
10 20 pF
∗1 RST specifies only when the power-on reset circuit has been selected througn mask option.
∗2 RST specifies input current when the pull-up resistance has been selected; Ieakage current when no
resistance has been selected.
∗3 Specifies only when the oscillatlon of OSD has been terminated.
∗4 This device does not enter the stop mode.
– 11 –
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet CXP85224A.PDF ] | |
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