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PDF CXP83200A Data sheet ( Hoja de datos )
| Número de pieza | CXP83200A | |
| Descripción | CMOS 8-bit Single Chip Microcomputer | |
| Fabricantes | Sony Corporation | |
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CXP83200A
CMOS 8-bit Single Chip Microcomputer
Piggyback/
evaluator type
Description
The CXP83200A is a CMOS 8-bit single chip
microcomputer of piggyback/evaluator combined type,
which is developed for evaluating the function of the
CXP83120A/83124A and CXP83232/83240.
100 pin PQFP (Ceramic)
Features
• Wide-range instruction system (213 instructions) to
cover various types of data
QFP supported
LQFP supported
– 16-bit operation/multiplication and division/Boolean
bit operation instructions
• Minimum instruction cycle 400ns at 10MHz operation
8µs at 500kHz operation
122µs at 32kHz operation
• Applicable EPROM
LCC type 27C512
(Maximum 40K bytes are available.)
• Incorporated RAM capacity 1120 bytes (Including LCD display data area)
• Peripheral functions
– A/D converter
8-bit, 8-channel, successive approximation method
(Conversion time of 32µs/10 MHz)
– Serial interface
Incorporated 8-bit, 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
8-bit clock sync type, 1 channel
– Timer
8-bit timer
8-bit timer/counter
19-bit time base timer
16-bit capture timer/counter
32kHz timer/counter
– LCD controller/driver
Maximum 160 segment display possible (for 1/4 duty)
4 lines for common output, 40 lines for segment output
Display method static: 1/2, 1/3, 1/4 duty
Bias method: 1/2, 1/3 bias
– Remote control reception circuit 8-bit pulse measurement counter with on-chip 6-stage FIFO
– PWM output
14 bits, 1 channel
• Interruption
15 factors, 15 vectors, multi-interruption possible
• Standby mode
SLEEP/STOP
• Package
100-pin ceramic PQFP
Note) Mask option depends on the type of the CXP83200A. Refer to the Products List for details.
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E94831A68-PS
1 page  
Pin Configuration in Evaluator Mode (LQFP package)
CXP83200A
PE4/RMC
PE5/PWM
PE6/TO/ADJ
PB0/CINT
PB1/CSO
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PH0
PH1
PH2
PH3
PH4
PH5
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
1 75
2 74
3 73
4 72
5 71
6 70
7
A15 1
28 VDD
69
8
A12 2
27 A14
68
9
A7/D7
3
26 A13
67
10
A6/D6
4
25 A8
66
11
A5/D5
5
24 A9
65
12
A4/D4
6
23 A11
64
13
A3/D3
7
22 HALT
63
14
A2/D2
8
21 A10
62
15
A1/D1
9
20 E/P
61
16
A0/D0
10
19 I/T
60
17
RD 11
18 MON
59
18
WR 12
17 RST
58
19
SYNC
13
16 C1
57
20
GND
14
15 C2
56
21 55
22 54
23 53
24 52
25 51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
SEG23/PD7
SEG22/PD6
SEG21/PD5
SEG20/PD4
SEG19/PD3
SEG18/PD2
SEG17/PD1
SEG16/PD0
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
Note) 1. NC (Pin 88) is always connected to VDD.
2. Vss (Pins 39 and 89) are both connected to GND.
–5–
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet CXP83200A.PDF ] | |
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