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PDF CXP828P60 Data sheet ( Hoja de datos )
| Número de pieza | CXP828P60 | |
| Descripción | CMOS 8-bit Single Chip Microcomputer | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXP828P60
CMOS 8-bit Single Chip Microcomputer
Description
The CXP828P60 is a CMOS 8-bit single chip
microcomputer integrating on a single chip an A/D
converter, serial interface, timer/counter, time base
timer, capture timer/counter, fluorescent display panel
controller/driver, remote control reception circuit, and
PWM output circuit besides the basic configurations
of 8-bit CPU, PROM, RAM, and I/O port.
The CXP828P60 also provides sleep/stop function
that enables lower power consumption.
CXP828P60 is the PROM-incorporated version of
the CXP82860 with bult-in mask ROM. This provides
the additional feature of being able to write directly
into the program. Thus, it is most suitable for
evaluation use during system development and for
small-quantity production.
100 pin QFP (Plastic)
Structure
Silicon gate CMOS IC
Features
• Wide-range instruction system (213 instructions) to cover various types of data
— 16-bit arithmetic/multiplication and division/Boolean bit operation instructions
• Minimum instruction cycle
400ns at 10MHz operation
122µs at 32kHz operation
• Incorporated PROM capacity
60K bytes
• Incorporated RAM capacity
1536 bytes (including fluorescent display area)
• Peripheral functions
— A/D converter
8 bist, 8 channels, successive approximation method
(Conversion time of 32µs/10MHz)
— Serial interface
8-bit, 8-stage FIFO incorporated
(Auto transfer for 1 to 8 bytes), 1 channel
8-bit clock synchronized type, 1 channel
— Timer
8-bit timer, 8-bit timer/counter, 19-bit time base timer
16-bit capture timer/counter, 32kHz timer/counter
— Fluorescent display panel controller/driver Supports the universal grid fluorescent display panel.
High voltage drive output port of 56 pins (40V)
Maximum of 640 segments display possible
Display timing number of 1 to 20
Dimmer function
Incorporated pull-down resistor
Hardware key scan function (Maximum of 16 x 8 key matrix
supportable)
— Remote control reception circuit
8-bit pulse measurement counter, 6-stage FIFO
— PWM output
14 bits, 1 channel
• Interruption
16 factors, 15 vectors, multi-interruption possible
• Standby mode
SLEEP/STOP
• Package
100-pin plastic QFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E95Z36-ST
1 page  
CXP828P60
Pin code
PG0/A39
to
PG7/A32
PH0/A31
to
PH7/A24
A16 to A23
G0/A0
to
G15/A15
VFDP
EXTAL
XTAL
TEX
TX
RST
AVREF
AVSS
VDD
Vpp
VSS
I/O
Output/Output
Output/Output
Output
Output/Output
Input
Output
Input
Output
Input
Input
Functions
(Port G)
8-bit output port.
(8 pins)
FDP segment signal (anode
connection) outputs.
(Port H)
8-bit output port.
(8 pins)
FDP segment signal (anode
connection) outputs.
(8 pins)
FDP segment signal (anode connection) outputs.
(8 pins)
Outputs for FDP timing signals (grid connection)/segment signals (anode
connection).
(16 pins)
FDP voltage supply for incorporated pull-down (PD) resistor.
Crystal connectors for system clock oscillation. When the clock is
supplied externally, input to EXTAL; opposite phase clock should be
input to XTAL.
Crystal connectors for 32kHz timer/counter clock oscillation. For usage
as event input, input to TEX, and open TX.
Low-level active, system reset.
Reference voltage input for A/D converter.
A/D converter GND.
VCC supply.
Vcc supply for incorporated PROM writing.
Connect to VDD during normal operation.
GND.
–5–
5 Page 
CXP828P60
Recommended Operating Conditions
(Vss = 0V reference)
Item
Supply voltage
Symbol Min.
4.5
VDD 3.5
2.7
Max.
5.5
5.5
5.5
Unit Remarks
Guaranteed operation range during
V high-speed mode (1/2, 1/4 frequency
dividing clock)
Guaranteed operation range during
V low-speed mode or SLEEP mode
(1/16 frequency dividing clock)
V
Guaranteed operation range with TEX
clock
High level input
voltage
Low level input
voltage
Operating temperature
VIH
VIHS
VIHEX
VIL
VILS
VILEX
Topr
2.5 5.5
0.7VDD
VDD
0.8VDD
VDD
VDD – 0.4 VDD + 0.3
0 0.3VDD
0 0.2VDD
–0.3 0.4
–10 +75
V
V
V
V
V
V
V
°C
Guaranteed data hold range during STOP
∗1
Hysteresis input∗2
EXTAL∗3
∗1
Hysteresis input∗2
EXTAL∗3
∗1) Value for each pin of normal input port (PA, PB4, PB7, PC).
∗2) Value of the following pins: RST, CINT, CS0, SCK0, SCK1, EC0/INT0, EC1/INT1, INT2, INT3/NMI, RMC.
∗3) Specifies only during external clock input.
– 11 –
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet CXP828P60.PDF ] | |
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