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PDF CXP827P16 Data sheet ( Hoja de datos )
| Número de pieza | CXP827P16 | |
| Descripción | CMOS 8-bit Single Chip Microcomputer | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXP827P16
CMOS 8-bit Single Chip Microcomputer
Description
The CXP827P16 microcomputer is composed of a
CPU, ROM, RAM, and I/O ports. These chips feature
many other high-performance circuits in a single-chip
CMOS design, including an A/D converter, serial
interface, timer/counter, time-base timer, fluorescent
display panel controller/driver, remote control receiver,
PWM output circuit and 32kHz timer/counter.
This IC also includes sleep/stop functions which
can be used to achieve low power consumption.
CXP827P16 is the PROM-incorporated version of
the CXP82716 with built-in mask ROM, and it is able to
write directly into the program. Thus, it is most suitable
for evaluation use during system development and for
small-quantity production.
64 pin SDIP (Plastic)
Structure
Silicon gate CMOS IC
Features
• Instruction set which supports a wide array of data types
— 213 types of instructions which include 16-bit calculations, multiplication and division arithmetic,
and Boolean bit operations.
• Minimum instruction cycle
400ns at 10MHz
122µs at 32kHz
• On-chip PROM
16 Kbytes
• On-chip RAM
448 bytes (Including fluorescent display data area)
• Peripheral functions
— A/D converter
8-bit, 8-channel, successive approximation system
(conversion rate 32µs/10MHz)
— Serial interface
On-chip 8-bit, 8-stage FIFO (1 to 8 bytes auto transfer),
2 channels for 1 circuit
— Timers
8-bit timer
8-bit timer/counter
19-bit time-base timer
32kHz timer/counter
— Fluorescent display panel controller/driver
High voltage drive output port of 24 pins (40V)
Maximum of 144 segments display available
1 to 16-digit dynamic display
Dimmer function
On-chip pull-down resistor
Hardware key scan function (Maximum of 8 × 8 key matrix available)
— Remote control receiver circuit
On-chip 6-stage FIFO 8-bit pulse measurement counter
— PWM output
8-bit, 1-channel
• Interrupts
13 factors, 13 vectors multi-interruption possible
• Standby mode
SLEEP/STOP
• Package
64-pin plastic SDIP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E93Z22-ST
1 page  
CXP827P16
Symbol
PF5/S13
to
PF7/S15
S16 to S20
T8/S28
to
T15/S21
T0 to T7
VFDP
EXTAL
XTAL
PH1/TEX
PH0/TX
RST
Vpp
VDD
Vss
I/O
Output/Output
Output
Output/Output
Output
Input
Output
Input/Input
Input/Output
Input
Functions
(Port F)
3-bit output port.
(3 pins)
Segment signal output for FDP.
(3 pins)
Segment signal output for FDP. (5 pins)
Output for FDP timing and segment signals. (8 pins)
Timing signal output for FDP. (8 pins)
FDP voltage supply when on-chip resistor is selected by mask option.
Crystal connectors for system clock oscillation. When the clock is
supplied externally, input to EXTAL; opposite phase clock should be
input to XTAL.
(Port H)
2-bit input
port.
(2 pins)
Crystal connectors for 32kHz timer/counter clock
oscillation circuit. Connect a 32kHz crystal oscillator
between TEX and TX. For usage as event input, connect
clock oscillation source to TEX, and leave TX open.
System reset. Low-level active. RST is input pin.
Positive power supply pin for writing of built-in PROM.
Under normal operating conditions, connect to VDD.
Positive power supply.
GND
–5–
5 Page 
CXP827P16
Recommended Operating Conditions
(Vss = 0V)
Item
Symbol Min.
Max. Unit
Remarks
4.5
5.5
V
Guaranteed operation range for high speed
mode (1/2, 1/4 frequency dividing clock)
Supply voltage
VDD
3.5
5.5
V
Guaranteed operation range for low speed
mode (1/16 frequency dividing clock)
2.7 5.5 V Guaranteed operation range with TEX clock
Vpp
High level
input voltage
VIH
VIHS
VIHEX
Low level
input voltage
VIL
VILS
VILEX
Operating temperature Topr
2.5 5.5
Vpp = VDD
0.7VDD
VDD
0.8VDD
VDD
VDD – 0.4 VDD +0.3
0 0.3VDD
0 0.2VDD
–0.3 0.4
–10 +75
V
Guaranteed data hold operation range
during STOP
V ∗4
V ∗1
V Hysteresis input∗2
V EXTAL pin∗3
V ∗1
V Hysteresis input∗2
V EXTAL pin∗3
°C
∗1) All regular input port (PA, PB4, PB7, PC, PH).
∗2) For pins RST, CS0, CS1, SI0, SI1 SCK0, SCK1, EC/INT0, INT1, INT2, INT3/NMI, RMC.
∗3) Specifies only for external clock input.
∗4) Vpp should be the same voltage as VDD.
– 11 –
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet CXP827P16.PDF ] | |
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