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PDF CXP82032 Data sheet ( Hoja de datos )
| Número de pieza | CXP82032 | |
| Descripción | CMOS 8-bit Single Chip Microcomputer | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXP82032/82040/82052/82060
CMOS 8-bit Single Chip Microcomputer
Description
The CXP82032/82040/82052/82060 is a CMOS 8-
100 pin QFP (Plastic)
bit single chip microcomputer integrating on a single
chip an A/D converter, serial interface, timer/counter,
time-base timer, capture timer/counter, fluorescent
display panel controller/driver, remote control
reception circuit, and PWM output besides the basic
configurations of 8-bit CPU, ROM, RAM, and I/O port.
The CXP82032/82040/82052/82060 also provides
sleep/stop function that enables lower power
consumption.
Structure
Features
Silicon gate CMOS IC
• Wide-range instruction system (213 instructions)
to cover various types of data
— 16-bit arithmetic/multiplication and division/boolean bit operation instructions
• Minimum instruction cycle
250ns at 16MHz operation
122µs at 32kHz operation
• Incorporated ROM capacity
32k bytes (CXP82032)
40k bytes (CXP82040)
52K bytes (CXP82052)
60K bytes (CXP82060)
• Incorporated RAM capacity
3984 bytes (including fluorescent display area)
• Peripheral functions
— A/D converter
8 bits, 8 channels, successive approximation method
(Conversion time of 3.25µs/16MHz)
— Serial interface
Buffer RAM incorporated (Auto transfer for 1 to 32 bytes), 1 channel
8-bit clock synchronized type (MSB/LSB first selectable), 1 channel
Start-stop synchronized type (UART), 1 channel
— Timers
8-bit timer, 8-bit timer/counter, 19-bit time-base timer
16-bit capture timer/counter, 32kHz timer/counter
— Fluorescent display panel controller/driver Supports the universal grid fluorescent display panel.
High voltage drive output port of 56 pins (40V)
Maximum of 640 segments display possible
Display timing number of 1 to 20
Dimmer function
Incorporated pull-down resistor (Mask option)
Hardware key scan function (Maximum of 16 × 8 key matrix
supportable)
— Remote control reception circuit
8-bit pulse measurement counter, 6-stage FIFO
— PWM output
14 bits, 1 channel
• Interruption
17 factors, 15 vectors, multi-interruption possible
• Standby mode
Sleep/stop
• Package
100-pin plastic QFP
• Piggy/evaluation chip
CXP82000 100-pin ceramic QFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E97413A95-PS
1 page  
CXP82032/82040/82052/82060
Symbol
PF0/A47
to
PF7/A40
PG0/A39
to
PG7/A32
PH0/A31
to
PH7/A24
PI0
PI1
PI2/TX
PI3/TEX
A16 to A23
G0/A0
to
G15/A15
VFDP
EXTAL
XTAL
RST
NC
VDD
VSS
I/O
I/O/Output
Output/Output
Output/Output
Input
Input
Input
Input/Input
Output
Output/Output
Input
Input
Functions
(Port F)
8-bit I/O port. I/O can be set in a
unit of single bits.
(8 pins)
FDP segment signal (anode
connection) outputs.
(8 pins)
(Port G)
8-bit output port.
(8 pins)
FDP segment signal (anode
connection) outputs.
(8 pins)
(Port H)
8-bit output port.
(8 pins)
FDP segment signal (anode
connection) outputs.
(8 pins)
(Port I)
4-bit input port.
(4 pins)
Crystal connectors for 32kHz timer/counter clock
oscillation. For usage as event counter, input to TEX,
and leave TX open.
FDP segment signal (anode connection) outputs.
(8 pins)
Outputs for FDP timing signals (grid connection)/segment signals (anode
connection).
(16 pins)
FDP voltage supply when incorporated pull-down (PD) resistor is set by
mask option.
Crystal connectors for system clock oscillation. When the clock is
supplied externally, input to EXTAL; opposite phase clock should be
input to XTAL.
Low-level active, system reset.
NC. Under normal operation, leave this pin open.
VCC supply.
GND.
–5–
5 Page 
CXP82032/82040/82052/82060
Recommended Operating Conditions
(Vss = 0V reference)
Item
Symbol Min.
Max. Unit
Remarks
Guaranteed operation range during
4.5 5.5 V 1/2 and 1/4 frequency dividing operation
mode
Supply voltage
VDD
3.5
5.5
V
During 1/16 frequency dividing
operation mode or sleep mode
2.7
5.5
V
Guaranteed operation range with TEX
clock
High level input
voltage
Low level input
voltage
2.5 5.5 V Guaranteed data hold range during stop
VIH
0.7VDD
VDD
V ∗1
VIHS
0.8VDD
VDD
V ∗2
VIHH
0.7VDD
VDD
V ∗3
VIHEX VDD – 0.4 VDD + 0.3 V EXTAL∗4
VIL
0
0.3VDD
V ∗1
VILS
0
0.2VDD
V ∗2
VILH 0 0.7 V ∗3
VILEX
–0.3
0.4 V EXTAL∗4
Operating temperature Topr –20 +75 °C
∗1 Value for each pin of normal input port (PA,PB0, PB4, PB7, PC).
∗2 Value of the following pins: RST, CINT, CS0/TxD, RxD, SI0, SI1, SCK0, SCK1, EC0/INT0, EC1/INT1, INT2,
INT3/NMI, RMC.
∗3 Value of the following pins: PD, PF.
∗4 Specifies only during external clock input.
– 11 –
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet CXP82032.PDF ] | |
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