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PDF CXP81960 Data sheet ( Hoja de datos )
| Número de pieza | CXP81960 | |
| Descripción | CMOS 8-bit Single Chip Microcomputer | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXP81952/81960
CMOS 8-bit Single Chip Microcomputer
Description
The CXP81952/81960 is a CMOS 8-bit micro-
computer which consists of A/D converter, serial
interface, timer/counter, time base timer, vector
interruption, high precision timing pattern generation
circuit, PWM generator, PWM for tuner, 32kHz
timer/event counter, remote control receiving circuit,
general purpose prescaler, and external signal, as
well as basic configurations like 8-bit CPU, ROM,
RAM and I/O port. They are integrated into a single
chip.
Also the CXP81952/81960 provides sleep/stop
function which enables to lower power consumption
and ultra-low speed instruction mode in 32kHz
operation.
100 pin QFP (PIastic) 100 pin LQFP (PIastic)
Structure
Silicon gate CMOS IC
Features
• A wide instruction set (213 instructions) which cover various types of data
— 16-bit operation/multiplication and division/boolean bit operation instructions
• Minimum instruction cycle
250ns at 16MHz operation
122µs at 32kHz operation
• Incorporated ROM capacity 52K bytes (CXP81952), 60K bytes (CXP81960)
• Incorporated RAM capacity 2048 bytes
• Peripheral functions
— A/D converter
8-bit, 12-channel, successive approximation system
(Conversion time 20.0µs/16MHz)
— Serial Interface
Incorporated buffer RAM (1 to 32 bytes auto transfer) 1-channel
Incorporated 8-bit and 8-stage FIFO for data
(1 to 8 bytes auto transfer) 1-channel
— Timer
8-bit timer, 8-bit timer/counter, 19-bit time base timer,
32kHz timer/counter
— High precision timing pattern generator PPG 19-pin 32-stage programmable
RTG 5-pin 2-channel
— PWM/DA gate output
PWM 12-bit, 2-channel (Repetitive frequency 62kHz/16MHz)
DA gate pulse output 13-bit, 4-channel
— FRC capture unit
Incorporated 26-bit and 8-stage FIFO
— PWM output
14-bit, 1-channel
— Remote control receiving circuit
8-bit pulse measurement counter with on-chip, 6-stage FIFO
— General purpose prescaler
7-bit (PG5 input frequency divided, FRC capture possible)
• Interruption
20 factors, 15 vectors, multi-interruption possible
• Standby mode
SLEEP/STOP
• Package
100-pin plastic QFP/LQFP
• Piggyback/evaluation chip
CXP81900 100-pin ceramic QFP/LQFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E95110-ST
1 page  
CXP81952/81960
Pin Description
Symbol
I/O
PA0/PPO0
to
PA7/PPO7
Output/
Real time
output
PB0/PPO8
to
PB7/PPO15
Output/
Real time
output
PC0/PPO16
to
PC2/PPO18
PC3/RTO3
to
PC7/RTO7
I/O/
Real time
output
I/O/
Real time
output
PD0 to PD7 I/O
PE0/INT0
Input/Input
PE1/EC/INT2 Input/Input/Input
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
AN0 to AN3
PF0/AN4
to
PF3/AN7
PF4/AN8
to
PF7/AN11
SCK0
SO0
SI0
CS0
Output/Output
Output/Output
Output/Output
Output/Output
Output/Output
Output/Output
Input
Input/Input
Output/Input
I/O
Ouput
Input
Input
Description
(Port A)
8-bit output port. Data is
gated with PPO contents by
OR-gate and they are output.
(8 pins)
(Port B)
8-bit output port. Data is
gated with PPO contents by
OR-gate and they are output.
(8 pins)
Programmable pattern generator (PPG)
output.
Functions as high precision real time
pulse output port.
(19 pins)
(Port C)
8-bit I/O port, enables to
specify I/O by bit unit.
Data is gated with PPO or
RTO contents by OR-gate
and they are output.
(8 pins)
Real time pulse generator (RTG) output.
Functions as high precision real time
pulse output port. (5 pins)
(Port D)
8-bit I/O port. Enable to specify I/O by 4-bit unit.
Enables to drive 12mA sink current.
(8 pins)
Input pin to request external interruption.
Active when falling edge.
(Port E)
8-bit port.
Lower 2 bits
are input pins
and upper 6
bits are output
pins.
(8 pins)
External event input
pin for timer/counter.
PWM output pins.
(2 pins)
Input pin to request
external interruption.
Active when falling edge.
DA gate pulse output pins.
(4 pins)
Analog input pins to A/D converter. (12 pins)
(Port F)
Lower 4 bits are input port and upper 4 bits are output port.
Lower 4 bits also serve as standby release input pin.
(8 pins)
Serial clock (CH0) I/O pin.
Serial data (CH0) output pin.
Serial data (CH0) input pin.
Serial chip select (CH0) input pin.
–5–
5 Page 
Pin Circuit format
Port J
Port J data
PJ0 to PJ7
8 pins
CS0
SI0
2 pins
Port J direction
Data bus
RD
(Port J)
Edge detection
Standby release
Data bus
RD
Schmitt input
IP
IP
To SIO
SO0
1 pin
SO0 from SIO
SO0 output enable
CXP81952/81960
When reset
Hi-Z
Hi-Z
Hi-Z
SCK0
1 pin
EXTAL
XTAL
2 pins
Internal serial clock
from SIO
SCK0 output enable
External serial clock to SIO
Schmitt input
IP
Hi-Z
• Shows the circuit
EXTAL
IP
composition during
oscillation.
Oscillation
• Feedback resistor is
removed during stop.
XTAL
– 11 –
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet CXP81960.PDF ] | |
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