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PDF CXP81900 Data sheet ( Hoja de datos )

Número de pieza CXP81900
Descripción CMOS 8-bit Single Chip Microcomputer
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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CXP81900
CMOS 8-bit Single Chip Microcomputer
Piggyback/
evaluator type
Description
The CXP81900 is a CMOS 8-bit single chip micro-
computer of piggyback/evaluator combined type,
which is developed for evaluating the function of the
CXP81952/81960.
100 pin PQFP (Ceramic)
Features
A wide instruction set (213 instructions) which cover
various types of data.
QFP supported
LQFP supported
– 16-bit operation/multiplication and division/
boolean bit operation instructions
Minimum instruction cycle 250ns at 16MHz operation (4.5 to 5.5V)
333ns at 12MHz operation (3.0 to 5.5V)
122µs at 32kHz operation
Applicable EPROM
LCC type 27C256, LCC type 27C512
(Maximum 60Kbytes are available.)
Incorporated RAM capacity 2048 bytes
Peripheral functions
– A/D converter
8-bit, 12-channel, successive approximation method
(Conversion time of 20µs/16MHz)
– Serial interface
Incorporated buffer RAM
(Auto transfer for 1 to 32 bytes), 1 channel
Incorporated 8-bit and 8-stage FIFO
(Auto transfer for 1 to 8 bytes), 1 channel
– Timer
8-bit timer, 8-bit timer/counter
19-bit time base timer
32kHz timer/counter
– High precision timing pattern generator PPG 19-pin, 32-stage programmable
RTG 5 pins, 2 channels
– PWM/DA gate output
PWM output 12 bits, 2 channels
(Repetitive frequency 62.5kHz/16MHz)
DA gate pulse output 13 bits, 4channels
– FRC capture unit
Incorporated 26-bit and 8-stage FIFO
– PWM output
14 bits, 1 channel
– Remote control receiving circuit
8-bit pulse measurement counter with on-chip 6-stage FIFO
– General purpose prescaler
7 bits (PG5 input frequency division, FRC capture possible.)
– HSYNC counter
12-bit event counter (SYNC1 input count)
Interruption
20 factors, 15 vectors, multi-interruption possible
Standby mode
SLEEP/STOP
Package
100-pin ceramic PQFP
Note) Mask option depends on the type of the CXP81900. Refer to the Products List for details.
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E95828A68-PS

1 page




CXP81900 pdf
Pin Assignment in Evaluator Mode (LQFP package)
CXP81900
PB3/PPO11
PB2/PPO10
PB1/PPO9
PB0/PPO8
PC7/RTO7
PC6/RTO6
PC5/RTO5
PC4/RTO4
PC3/RTO3
PC2/PPO18
PC1/PPO17
PC0/PPO16
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PD7
PD6
PD5
PD4
PD3
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
1 75
2 74
3 73
4 72
5 71
6 70
7
A15 1
28 VDD
69
8
A12 2
27 A14
68
9
A7/D7
3
26 A13
67
10
A6/D6
4
25 A8
66
11
A5/D5
5
24 A9
65
A4/D4
6
23 A11
12
64
13
A3/D3
7
22 HALT
63
A2/D2
8
21 A10
14
62
15
A1/D1
9
20 E/P
61
16
A0/D0
10
19 I/T
60
17
RD 11
18 MON
59
18
WR 12
17 RST
58
SYNC
13
16 C1
19
57
GND
14
15 C2
20
56
21 55
22 54
23 53
24 52
25 51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
PE1/EC/INT2
PE2/PWM0
PE3/PWM1
PE4/DAA0
PE5/DAA1
PE6/DAB0
PE7/DAB1
PG0
PG1
PG2
PG3
PG4
PG5/PCK
PG6/EXI0
PG7/EXI1
AN0
AN1
AN2
AN3
PF0/AN4
PF1/AN5
PF2/AN6
PF3/AN7
AVDD
AVREF
Note) 1. NC (Pin 88) is always connected to VDD.
2. VSS (Pins 39 and 86) are both connected to GND.
3. MP (Pin 37) is always connected to GND.
–5–

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