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PDF HS9-565ARH-T Data sheet ( Hoja de datos )
| Número de pieza | HS9-565ARH-T | |
| Descripción | Radiation Hardened High Speed/ Monolithic Digital-to-Analog Converter | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
HS-565ARH-T
July 1999 File Number 4607.1
Radiation Hardened High Speed,
Monolithic Digital-to-Analog Converter
Intersil’s Satellite Applications FlowTM (SAF) devices are fully
tested and guaranteed to 100kRAD total dose. This QML
Class T device is processed to a standard flow intended to
meet the cost and shorter lead-time needs of large volume
satellite manufacturers, while maintaining a high level of
reliability.
The HS-565ARH-T is a fast, radiation hardened 12-bit
current output, digital-to-analog converter. The monolithic
chip includes a precision voltage reference, thin-film R-2R
ladder, reference control amplifier and twelve high-speed
bipolar current switches.
The Intersil Semiconductor Dielectric Isolation process
provides latch-up free operation while minimizing stray
capacitance and leakage currents, to produce an excellent
combination of speed and accuracy. Also, ground currents
are minimized to produce a low and constant current through
the ground terminal, which reduces error due to code-
dependent ground currents.
HS-565ARH-T die are laser trimmed for a maximum integral
nonlinearity error of ±0.25 LSB at 25oC. In addition, the low
noise buried zener reference is trimmed both for absolute value
and minimum temperature coefficient.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HS-565ARH-T
are contained in SMD 5962-96755. A “hot-link” is provided
from our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Intersil‘s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Ordering Information
ORDERING
NUMBER
PART
NUMBER
TEMP.
RANGE
(oC)
5962R9675501TJC
HS1-565ARH-T
-55 to 125
5962R9675501TXC
HS9-565ARH-T
-55 to 125
NOTE: Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
Features
• qml Class T, Per MIL-PRF-38535
• Radiation Performance
- Gamma Dose (γ) 1 x 105 RAD(Si)
- No Latch-Up, Dielectrically Isolated Device Islands
• DAC and Reference on a Single Chip
• Pin Compatible with AD-565A and HI-565A
• Very High Speed: Settles to 0.50 LSB in 500ns Max
• Monotonicity Guaranteed Over Temperature
• 0.50 LSB Max Nonlinearity Guaranteed Over Temperature
• Low Gain Drift (Max., DAC Plus Reference) 50ppm/oC
• ±0.75 LSB Accuracy Guaranteed Over Temperature
(±0.125 LSB Typical at 25oC)
Pinouts
HS1-565ARH-T (SBDIP), CDIP2-T24
TOP VIEW
NC 1
NC 2
VCC 3
REF OUT 4
REF GND 5
REF IN 6
-VEE 7
BIPOLAR RIN 8
IDAC OUT 9
10V SPAN 10
20V SPAN 11
PWR GND 12
24 BIT 1 IN (MSB)
23 BIT 2 IN
22 BIT 3 IN
21 BIT 4 IN
20 BIT 5 IN
19 BIT 6 IN
18 BIT 7 IN
17 BIT 8 IN
16 BIT 9 IN
15 BIT 10 IN
14 BIT 11 IN
13 BIT 12 IN (LSB)
HS9-565ARH-T (FLATPACK), CDFP4-F24
TOP VIEW
NC
NC
VCC
REF OUT
REF GND
REF IN
-VEE
BIPOLAR RIN
IDAC OUT
10V SPAN
20V SPAN
PWR GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
BIT 1 IN
(MSB)
BIT 2 IN
BIT 3 IN
BIT 4 IN
BIT 5 IN
BIT 6 IN
BIT 7 IN
BIT 8 IN
BIT 9 IN
BIT 10 IN
BIT 11 IN
BIT 12 IN
(LSB)
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.
1 page  
MODE
Bipolar (See Figure 2)
HS-565ARH-T
TABLE 1. OPERATING MODES AND CALIBRATION (Continued)
CIRCUIT CONNECTIONS
OUTPUT
RANGE
PIN 10
TO
PIN 11
TO
RESISTOR
(R)
APPLY
INPUT CODE
±10V
NC VO
1.69K
All 0’s
All 1’s
±5V
VO Pin 10
1.43K
All 0’s
All 1’s
±2.5V
VO Pin 9
1.1K
All 0’s
All 1’s
CALIBRATION
ADJUST
R3
R4
R3
R4
R3
R4
TO SET VO
-10V
+9.99512V
-5V
+4.99756V
-2.5V
+2.49878V
OUT
PULSE
SYNC
IN
PULSE
OUT
GENERATOR TRIG GENERATOR
NO. 2
OUT
NO. 2
C
A 20V ± 20%
HS-565ARH-T
BIAS
24 8 TURN ON
23
.
.
.
. 9.95K
.
.
.
.
.
.
~100 .
kHz .
.
14
11 TURN OFF
5K
10
NC
5K
9
2.5K
B+
-
STROBE IN
D
COMPARATOR
OUT
P 13 2mA
5V
5
LSB
12
90 200K
DVM
10
0.1µF
VLSB
SUPPLY
FIGURE 3A.
Other Considerations
Grounds
The HS-565ARH-T has two ground terminals, pin 5 (REF
GND) and pin 12 (PWR GND). These should not be tied
together near the package unless that point is also the
system signal ground to which all returns are connected. (If
such a point exists, then separate paths are required to pins
5 and 12).
The current through pin 5 is near zero DC (Note); but pin 12
carries up to 1.75mA of code - dependent current from bits
1, 2, and 3. The general rule is to connect pin 5 directly to
the system “quiet” point, usually called signal or analog
ground. Connect pin 12 to the local digital or power ground.
Then, of course, a single path must connect the
analog/signal and digital/power grounds.
NOTE: Current cancellation is a two step process within the HS-
565ARH-T in which code dependent variations are eliminated, the re-
sulting DC current is supplied internally. First an auxiliary 9-bit R-2R
ladder is driven by the complement of the DACs input code. Together,
5
+3V
A
0V
0V
B
-400mV
(TURN OFF)
2V
C
0.8V
4V
D
0V
50%
tX
50%
-0.50LSB
DIGITAL
INPUT
DAC
OUTPUT
SETTLING TIME
tD = COMPARATOR DELAY
COMP.
STROBE
“EQUAL BRIGHTNESS”
COMP.
OUT
FIGURE 3B.
the main and auxiliary ladders draw a continuous 2.25mA from the
internal ground node, regardless of input code. Part of the DC current
is supplied by the zener voltage reference, and the remainder is
sourced from the positive supply via a current mirror which is laser
trimmed for zero current through the external terminal (pin 5).
Layout
Connections to pin 9 (IOUT) on the HS-565ARH-T are most
critical for high speed performance. Output capacitance of
the DAC is only 20pF, so a small change of additional
capacitance may alter the op amp’s stability and affect
settling time. Connections to pin 9 should be short and few.
Component leads should be short on the side connecting to
pin 9 (as for feedback capacitor C). See the Settling Time
Section.
Bypass Capacitors
Power supply bypass capacitors on the op amp will serve the
HS-565ARH-T also. If no op amp is used, a 0.01mF ceramic
capacitor from each supply terminal to pin 12 is sufficient,
since supply current variations are small.
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet HS9-565ARH-T.PDF ] | |
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