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PDF HT93LC46 Data sheet ( Hoja de datos )

Número de pieza HT93LC46
Descripción 1K 3-Wire CMOS Serial EEPROM
Fabricantes Holtek Semiconductor Inc 
Logotipo Holtek Semiconductor Inc Logotipo



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HT93LC46
1K 3-Wire CMOS Serial EEPROM
Features
Operating voltage VCC
Read: 2.0V~5.5V
Write: 2.4V~5.5V
Low power consumption
Operating: 5mA max.
Standby: 10µA max.
User selectable internal organization
1K(HT93LC46): 128×8 or 64×16
3-wire Serial Interface
Write cycle time: 2ms max.
Automatic erase-before-write operation
Word/chip erase and write operation
Write operation with built-in timer
Software controlled write protection
10-year data retention after 100K rewrite
cycles
106 rewrite cycles per word
8-pin DIP/SOP package
Commercial temperature range
(0°C to +70°C)
General Description
The HT93LC46 is a 1K-bit low voltage nonvola-
tile, serial electrically erasable programmable
read only memory device using the CMOS float-
ing gate process. Its 1024 bits of memory are
organized into 64 words of 16 bits each when the
ORG pin is connected to VCC or organized into
128 words of 8 bits each when it is tied to VSS. The
device is optimized for use in many industrial
and commercial applications where low power
and low voltage operation are essential. By
popular microcontroller, the versatile serial in-
terface including chip select (CS), serial clock
(SK), data input (DI) and data output (DO) can
be easily controlled.
Block Diagram
1 6th May ’99

1 page




HT93LC46 pdf
Timing Diagrams
HT93LC46
Functional Description
The HT93LC46 is accessed via a three-wire serial
communication interface. The device is arranged
into 64 words by 16 bits or 128 words by 8 bits
depending whether the ORG pin is connected to
VCC or VSS. The HT93LC46 contains seven in-
structions: READ, ERASE, WRITE, EWEN,
EWDS, ERAL and WRAL. When the user se-
lectable internal organization is arranged
into 64×16 (128×8), these instructions are all
made up of 9(10) bits data: 1 start bit, 2 op code
bits and 6(7) address bits.
By using the control signal CS, SK and data
input signal DI, these instructions can be given
to the HT93LC46. These serial instruction data
presented at the DI input will be written into
the device at the rising edge of SK. During the
READ cycle, DO pin acts as the data output and
during the WRITE or ERASE cycle, DO pin
indicates the BUSY/READY status. When the
DO pin is active for read data or as a
BUSY/READY indicator the CS pin must be
high; otherwise DO pin will be in a high-imped-
ance state. For successful instructions, CS must
be low once after the instruction is sent. After
power on, the device is by default in the EWDS
state. And, an EWEN instruction must be per-
formed before any ERASE or WRITE instruc-
tion can be executed. The following are the
functional descriptions and timing diagrams of
all seven instructions.
READ
The READ instruction will stream out data at a
specified address on the DO pin. The data on
DO pin changes during the low-to-high edge of
SK signal. The 8 bits or 16 bits data stream is
preceded by a logical “0” dummy bit. Irrespec-
tive of the condition of the EWEN or EWDS
instruction, the READ command is always
valid and independent of these two instruc-
tions. After the data word has been read the
internal address will be automatically incre-
mented by 1 allowing the next consecutive data
word to be read out without entering further
address data. The address will wrap around
with CS High until CS returns to LOW.
EWEN/EWDS
The EWEN/EWDS instruction will enable or
disable the programming capabilities. At both
the power on and power off state the device auto-
matically entered the disable mode. Before a
WRITE, ERASE, WRAL or ERAL instruction is
given, the programming enable instruction
EWEN must be issued, otherwise the
ERASE/WRITE instruction is invalid. After the
EWEN instruction is issued, the programming
enable condition remains until power is turned off
or a EWDS instruction is given. No data can be
written into the device in the programming dis-
abled state. By so doing, the internal memory
data can be protected.
5 6th May ’99

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