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Número de pieza | HYB314171BJL-50 | |
Descripción | 3.3V 256 K x 16-Bit Dynamic RAM 3.3V Low Power 256 K x 16-Bit Dynamic RAM with Self Refresh | |
Fabricantes | Siemens Semiconductor Group | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HYB314171BJL-50 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
No Preview Available ! 3.3V 256 K x 16-Bit Dynamic RAM
3.3V Low Power 256 K x 16-Bit
Dynamic RAM with Self Refresh
HYB 314171BJ-50/-60/-70
HYB 314171BJL-50/-60/-70
Preliminary Information
• 262 144 words by 16-bit organization
• 0 to 70 °C operating temperature
• Fast access and cycle time
• RAS access time:
50 ns (-50 version)
60 ns (-60 version)
70 ns (-70 version)
• CAS access time:
15ns (-50,-60 version)
20 ns (-70 version)
• Cycle time:
95 ns (-50 version)
110 ns (-60 version)
130 ns (-70 version)
• Fast page mode cycle time
35 ns (-50 version)
40 ns (-60 version)
45 ns (-70 version)
• Single + 3.3 V (± 0.3 V) supply with a built-
in VBB generator
• Low Power dissipation
max. 450 mW active (-50 version)
max. 378 mW active (-60 version)
max. 306 mW active (-70 version)
• Standby power dissipation
7.2 mW standby (TTL)
3.6 mW max. standby (CMOS)
0.72 mW max. standby (CMOS) for
Low Power Version
• Output unlatched at cycle end allows two-
dimensional chip selection
• Read, write, read-modify write, CAS-
before-RAS refresh, RAS-only refresh,
hidden-refresh and fast page mode
capability
• 2 CAS / 1 WE control
• Self Refresh (L-Version)
• All inputs and outputs TTL-compatible
• 512 refresh cycles / 16 ms
• 512 refresh cycles / 128 ms
Low Power Version only
• Plastic Packages:
P-SOJ-40-1 400mil width
The HYB 314171BJ/BJL is a 4 MBit dynamic RAM organized as 262 144 words by 16-bit. The
HYB 314171BJ/BJL utilizes CMOS silicon gate process as well as advanced circuit techniques to
provide wide operation margins, both internally and for the system user. Multiplexed address inputs
permit the HYB 314171BJ/BJL to be packed in a standard plastic 400mil wide P-SOJ-40-1 package.
This package size provides high system bit densities and is compatible with commonly used
automatic testing and insertion equipment. System oriented features include Self Refresh (L-
Version), single + 3.3 V (± 0.3 V) power supply, direct interfacing with high performance logic
device families.
Semiconductor Group
1
7.96
1 page HYB 314171BJ/BJL-50/-60/-70
3.3V 256 K x 16-DRAM
Absolute Maximum Ratings
Operating temperature range ........................................................................................ 0 to + 70 °C
Storage temperature range..................................................................................... – 55 to + 150 °C
Input/output voltage .................................................................................... – 1 to (VCC + 0.5, 4.6) V
Power supply voltage.................................................................................................. – 1 to + 4.6 V
Data out current (short circuit) ................................................................................................ 50 mA
Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
DC Characteristics
TA = 0 to 70 °C; VSS = 0 V; VCC = 3.3 V ± 0.3 V, tT = 5 ns
Parameter
Input high voltage
Input low voltage
LVTTL Output high voltage (IOUT = – 2.0 mA)
LVTTL Output low voltage (IOUT = 2 mA)
LVCMOS Output high voltage (IOUT = – 100 µA)
LVCMOS Output low voltage (IOUT = 100 µA)
Input leakage current, any input
(0 V < VIN < VCC + 0.3 V, all other inputs = 0 V)
Output leakage current
(DO is disabled, 0 V < VOUT < VCC + 0.3 V )
Average VCC supply current:
-50 version
-60 version
-70 version
Symbol
Limit Values
min.
max.
VIH 2.0
VCC + 0.5
VIL – 1.0 0.8
VOH 2.4
–
VOL –
0.4
VOH 2.4
–
VOL –
0.4
II(L) – 10 10
IO(L) – 10 10
ICC1
–
125
105
85
Unit Notes
V1
V1
V1
V1
V1
V1
µA 1
µA 1
mA 2, 3, 4
Standby VCC supply current
(RAS = LCAS = UCAS = WE = VIH)
Average VCC supply current during
RAS-only refresh cycles:
-50 version
-60 version
-70 version
ICC2
ICC3
–
–
2 mA
2, 4
125 mA
105
85
Semiconductor Group
5
5 Page HYB 314171BJ/BJL-50/-60/-70
3.3V 256 K x 16-DRAM
Read Cycle
Semiconductor Group
11
11 Page |
Páginas | Total 24 Páginas | |
PDF Descargar | [ Datasheet HYB314171BJL-50.PDF ] |
Número de pieza | Descripción | Fabricantes |
HYB314171BJL-50 | 3.3V 256 K x 16-Bit Dynamic RAM 3.3V Low Power 256 K x 16-Bit Dynamic RAM with Self Refresh | Siemens Semiconductor Group |
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