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PDF AD1892 Data sheet ( Hoja de datos )
| Número de pieza | AD1892 | |
| Descripción | Integrated Digital Receiver/Rate Converter | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
Integrated Digital
Receiver/Rate Converter
AD1892
FEATURES
Complete EIAJ CP-340 (CP-1201), IEC-958, AES/EBU,
S/PDIF Compatible Digital Audio Receiver and
Asynchronous Sample Rate Converter
Status Pins and Microprocessor Interfaces for
Stand-Alone and Microcontroller-Oriented Operation
Integrated Channel Status Buffer and Q-Channel
Subcode Buffer (Supports EIAJ CP-2401)
20-Bit SamplePort® Architecture Provides Superb Jitter
Rejection on Input Port
Sample Rate Conversion from 8 kHz to 48 kHz with
1:5 Upsampling Range
1:0.85 Downsampling Range
120 dB Dynamic Range
–113 dB THD+N @ 1 kHz
CRC Calculation on Q-Channel Subcode (Consumer
Mode Only) and on Channel Status (Pro Mode Only)
Four-Wire SPI™ Compatible Serial Control Port
Mute Input Pin
Power-Down Mode
Single +5 V Supply
Flexible Three-Wire Serial Data Port with Left-Justified,
Right-Justified and I2S-Compatible Modes
28-Lead SOIC Package
APPLICATIONS
DVD, DAT, MD, DCC and CD-R Recorders and Players
Computer Multimedia Products
DAB Receivers, Automotive Digital Audio Networks
PRODUCT OVERVIEW
The AD1892 combines a CP-1201, CP-340, IEC-958, AES/
EBU, S/PDIF compatible Digital Audio Receiver (DAR) with
an asynchronous sample rate converter, allowing the user to
specify the output sample rate of the received digital audio infor-
mation. The DAR block features support for both Q-channel
subcode information (to support CD, CD-R, MD and DAT
digital audio formats) as well as Channel Status information. A
microcontroller interface, with an SPI compatible serial port,
allows full access to the 80-bit Q-Channel subcode buffer and to
the 32-bit Channel Status buffer, as well as to the control and
status registers. Additionally, key status information from the
incoming subframes and the Channel Status buffer is reported
on status output pins on the AD1892, so the AD1892 may be
used in systems that do not include a microcontroller or
microprocessor.
The asynchronous sample rate converter block is based on
market leading AD1890 family SamplePort rate conversion tech-
nology. The AD1892 offers a 1:5 upsampling range, and will
downsample from 48 kHz to 44.1 kHz. Input audio word widths
up to 20 bits are supported, and output audio word widths of 16
or 20 are supported, with 120 dB of dynamic range and –113 dB
THD+N. The rate converter inherently rejects jitter on the
recovered clocks from the incoming biphase-mark encoded
stream. Indeed, sample rate conversion is highly synergistic
with digital audio reception, allowing the use of a fully digital
phase locked loop clock recovery scheme with highly robust
clock recovery and jitter rejection.
(continued on Page 4)
FUNCTIONAL BLOCK DIAGRAM
512 x FSOUT
POWER-DOWN/RESET
MUTE
BIPHASE-MARK 2
INPUT
CLOCK
GENERATOR
ASYNCH SAMPLE
RATE CONVERTER
OUTPUT SERIAL
INTERFACE
BIPHASE-MARK
RECEIVER
COMPARATOR
DATA
BYPASS
CONTROL
AD1892
CRC
Q-CHANNEL
CHECK SUBCODE BUFFER
CRC CHANNEL STATUS
CHECK
BUFFER
MICROCONTROLLER
INTERFACE
3 BCLK
LRCLK
SDATA
SYNC
CA
CB
CC
CD
CE
CON/PRO
CSCLK
NO ERROR INTERRUPT U/C BIT SFCLK QDFS
SIGNAL
4
CLOCK, LATCH,
DATA IN,
DATA OUT
2
DIGITAL
SUPPLY
SamplePort is a registered trademark of Analog Devices, Inc.
SPI is a trademark of Motorola, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998
1 page  
AD1892
Decoded Channel Status Outputs (Continued)
Pin Name SOIC I/O Description
CC 19 O In consumer mode, CC is the inverse Channel Status Bit 3, Byte 0 (C3, pre-emphasis). CC = 0
indicates that the audio material has been pre-emphasized; CC = 1 indicates that the audio material
has not been pre-emphasized.
In professional mode, CC is the most significant bit of the two bits that encodes the emphasis status
of the audio material.
Table I illustrates the professional mode emphasis encoding.
Table I. Professional Mode Emphasis Encoding
AD1892
Output
CC CB
BYTE 0
Channel Status Bit
C2 C3
C4
Status
1 10 0
1 01 0
0 11 1
0 01 1
0 Emphasis not indicated. Receiver defaults to
no emphasis with manual override enabled.
0 None. Receiver manual override disabled.
0 50/15 µs. Receiver manual override disabled.
1 CCITT J. 17. Receiver manual override disabled.
CD
18 O
In consumer mode, CD indicates that the audio material is original over all category codes. The
state of this bit is affected by both the generation status “L” bit (Channel Status Bit 15, Byte 1) and
the category code (Channel Status Bits 8 through 14, Byte 1) since the definition of the L bit is re-
versed for three of the category codes (001XXXX, 0111XXX, and 100XXXX). CD = 0 indicates
that the audio material is original. CD = 1 indicates that the audio material is a copy (first genera-
tion or higher).
In professional mode, CD is the inverse of Channel Status Bit 9, Byte 1. CD provides some infor-
mation about channel mode. See below for additional details.
CE
17 O
In consumer mode, CE indicates the so-called “ignorant” category codes of “general” (0000 000)
and “A/D converter without copyright information” (0110 000). CE = 1 indicates that the audio
material is not encoded using an ignorant category code. CE = 0 indicates that the audio material is
encoded using an ignorant category code. This status output can be used in conjunction with the
CD output (Pin 18) to implement SCMS copy protection. See below for additional details.
In professional mode, CE indicates a Cyclic Redundancy Code (CRC) check error. CE = 0 indi-
cates that the calculated CRC value does not match the received CRC value. CE = 1 indicates that
the calculated CRC value does match the received CRC value. CE may be used to enable the dis-
play of the CA through CD states. If CE = 0, then CA through CD may be considered to be in
error, and their display should not be updated.
The Table II summarizes the function of the CA through CE pins, depending on the operating mode
(professional or consumer).
Table II. Decoded Channel Status Output Functions
CON/PRO 15 O
CSCLK 16 O
Pin Consumer
Professional
CA 0 = Audio, 1 = Nonaudio
0 = Audio, 1 = Nonaudio
CB 0 = Copy Permitted, 1 = Copy Inhibited Pre-emphasis Encoding
CC 0 = Pre-emphasis, 1 = No Pre-emphasis Pre-emphasis Encoding
CD 0 = Original, 1 = Copy
Inverse of Channel Status Bit 9
CE 0 = Ignorant Category, 1 = Not Ignorant 0 = C.S. CRC Error, 1 = No C.S. CRC Error
CON/PRO is defined as the inverse Channel Status bit 0, byte 0 (C0, pro/consumer). CON/PRO =
0 indicates professional mode. CON/PRO = 1 indicates consumer mode. The state of this pin inter-
nally determines the consumer/pro mode of the CA, CB, CC, CD and CE pins.
Channel Status Clock. Active HI (rising edge active). Outputs a pulse every 192 frames at the
start of the Channel Status block. Use the falling edge of this clock to latch the CA through CE
and CON/PRO output Channel Status signals. See Figure 38 for timing.
REV. 0
–5–
5 Page 
BYTE 2
BITS 0 1 2 3 SOURCE NUMBER
0 0 0 0 UNSPECIFIED.
1000 1
0100 2
1100 3
0 0 1 0 4 TO
0 1 1 1 14 (BINARY – BIT 0 IS LSB, BIT 3 IS MSB)
1 1 1 1 15
BITS 4 5 6 7 CHANNEL NUMBER
0 0 0 0 UNSPECIFIED.
1 0 0 0 A (LEFT IN 2 CHANNEL FORMAT)
0 1 0 0 B (RIGHT IN 2 CHANNEL FORMAT)
1 1 0 0 C TO
0 1 1 1 N (BINARY – BIT 4 IS LSB, BIT 7 IS MSB)
1111 O
Figure 10. Consumer Channel Status Byte 2
BYTE 3
BITS 0 1 2 3 FS: SAMPLE FREQUENCY
0 0 0 0 44.1 kHz.
0 1 0 0 48 kHz.
1 1 0 0 32 kHz.
X X X X ALL OTHER STATES OF BITS 0–3 ARE RESERVED.
BITS 4 5
00
01
10
11
CLOCK ACCURACY
LEVEL II, ؎1000 ppm (DEFAULT).
LEVEL III, VARIABLE PITCH.
LEVEL I, ؎50 ppm – HIGH ACCURACY.
RESERVED.
BITS 6 7
XX
RESERVED.
RESERVED
BYTES 4–23
Figure 11. Consumer Channel Status Bytes 3 Through 23
AD1892
BYTE 0
BIT 0
PRO = 1 (PROFESSIONAL)
0 CONSUMER USE OF CHANNEL STATUS BLOCK.
1 PROFESSIONAL USE OF CHANNEL STATUS BLOCK.
BIT 1
AUDIO
0 NORMAL AUDIO.
1 NON-AUDIO. CAN BE USED TO INDICATE AC-3 DATA.
BITS 2 3 4 ENCODED AUDIO SIGNAL EMPHASIS
0 0 0 EMPHASIS NOT INDICATED. RECEIVER DEFAULTS
TO NO EMPHASIS WITH MANUAL OVERRIDE ENABLED.
100
110
NONE. RECEIVER MANUAL OVERRIDE DISABLED.
50/15 µs. RECEIVER MANUAL OVERRIDE DISABLED.
1 1 0 CCITT J.17. RECEIVER MANUAL OVERRIDE DISABLED.
X X X ALL OTHER STATES OF BITS 2–4 ARE RESERVED.
BIT 5
LOCK: SOURCE SAMPLE FREQUENCY
0 LOCKED–DEFAULT.
1 UNLOCKED.
BITS 6 7
00
01
10
11
FS: SAMPLE FREQUENCY
SAMPLE FREQUENCY NOT INDICATED.
RECEIVER DEFAULTS TO 48 kHz AND MANUAL
OVERRIDE OR AUTO SET ENABLED.
48 kHz. MANUAL OVERRIDE OR AUTO SET DISABLED.
44.1 kHz. MANUAL OVERRIDE OR AUTO SET DISABLED.
32 kHz. MANUAL OVERRIDE OR AUTO SET DISABLED.
BYTE 1
BITS 0 1 2 3 CHANNEL MODE
0 0 0 0 MODE NOT INDICATED. RECEIVER DEFAULTS TO
2-CHANNEL MODE. MANUAL OVERRIDE ENABLED.
0 0 0 1 TWO CHANNELS. MANUAL OVERRIDE DISABLED.
0010
0011
0100
0101
SINGLE CHANNEL. MANUAL OVERRIDE DISABLED.
PRIMARY/SECONDARY (CH. A IS PRIMARY). MANUAL
OVERRIDE DISABLED.
STEREOPHONIC (CH. A IS LEFT). MANUAL OVERRIDE
DISABLED.
RESERVED FOR USED DEFINED APPLICATIONS.
0 1 1 0 RESERVED FOR USED DEFINED APPLICATIONS.
1 1 1 1 VECTOR TO BYTE 3. RESERVED.
X X X X ALL OTHER STATES OF BITS 0–3 ARE RESERVED.
BITS 4 5 6 7 USER BIT MANAGEMENT
0 0 0 0 DEFAULT. NO USER INFORMATION INDICATED.
0 0 0 1 192 BIT BLOCK STRUCTURE. PREAMBLE 'Z' STARTS
BLOCK.
0 0 1 0 RESERVED.
0 0 1 1 USER DEFINED APPLICATION.
X X X X ALL OTHER STATES OF BITS 4–7 ARE RESERVED.
Figure 12. Professional Channel Status Bytes 0 and 1
REV. 0
–11–
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet AD1892.PDF ] | |
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