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PDF AD7400 Data sheet ( Hoja de datos )

Número de pieza AD7400
Descripción Isolated Sigma-Delta Modulator
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Preliminary Technical Data
FEATURES
Up to 20 MHz Data Rate (AD7401)
10 MHz Data Rate (AD7400)
2nd Order Modulator
±4 LSB INL @16 Bits
Onboard Digital Isolator
Onboard Reference
Low Power Operation:
15 mA @ 5 V
-40ЊC to +105ЊC Operating Range
16-ld SOIC Package
Safety and Regulatory Approvals
UL Recognition
3750 VRMS for 1 minute per UL 1577
CSA Component Acceptance Notice ~5A
VDE Certificate of Conformity
DIN EN 60747-5-2 (VDE 0884 Part 2):2003-01
DIN EN 60950 (VDE 0805): 2001-12; EN 60950:2000
VIORM = 840VPEAK
Isolated Sigma-Delta Modulator
AD7400/AD7401
APPLICATIONS
AC Motor Control
Data Acquisition Systems
A/D + Opto-Isolator Replacement
GENERAL DESCRIPTION
The AD7400/AD7401 are 2nd order sigma-delta modulators
that convert an analog input signal into a high speed 1-bit data
stream with onboard digital isolation based on Analog Devices’
iCoupler® technology. The AD7400/AD7401 operate from a 5 V
power supply and accept a differential input signal of ±200 mV.
The analog input is continuously sampled by the analog
modulator, eliminating the need for external sample and hold
circuitry. The input information is contained in the output
stream as a density of ones with data rates up to 20MHz. The
original information can be reconstructed with an appropriate
digital filter. The serial I/O may use a 5V or 3V supply (VDD2).
The serial interface is digitally isolated. High-speed CMOS,
FUNCTIONAL BLOCK DIAGRAM
VDD1
VDD2
VIN+
VIN-
T/H
Σ-ADC
BUF
REF
CONTROL LOGIC
UPDATE
ENCODE
UPDATE
ENCODE
WATCHDOG
DECODE
WATCHDOG
DECODE
MDAT
MCLKOUT*
*MCLKIN pin on AD7401
GND1
GND2
Rev. PrH
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.

1 page




AD7400 pdf
Preliminary Technical Data
AD7400/AD7401
TIMING SPECIFICATIONS1
Table 3. AD7400/AD7401 Timing Specifications (VDD1 = VDD2 = 4.5V to 5.5V, TA = TMAX to TMIN unless otherwise noted.)
Parameter Limit at TMIN, TMAX Unit
Description
FMCLKOUT
10
MHz typ
AD7400
8.2/13.2
MHz min/max
TMCLKIN2
1
MHz min
AD7401
20 MHz max
t13 30
ns max
Data Access Time after MCLK Rising Edge
t23 15
ns min
Data Hold Time after MCLK Rising Edge
t3
0.4 x tMCLKIN
ns max
Master Clock Low Time
t4
0.4 x tMCLKIN
ns max
Master Clock High Time
NOTES
1 Sample tested @ 25ЊC to ensure compliance. All input signals are specified with tr = tf = 5ns (10% to 90% of VDD1) and timed form a voltage level of 1.6 Volts. See Figure
1.
2 Mark Space ratio for the MCLKIN input is 40/60 to 60/40.
3 Measured with the load circuit of Figure 1 and defined as the time required for the output to cross 0.8V or 2.0V.
200µA
IOL
TO
OUTPUT
PIN
CL
50pF
200µA
IOH
+1.6V
Figure 1. Load Circuit for Digital Output Timing Specifications
MCLKIN /
MCLKOUT
MDAT
t4
t1 t2 t3
Figure 2. Data Timing
Rev. PrH | Page 5 of 10

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