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PDF AK4114 Data sheet ( Hoja de datos )
| Número de pieza | AK4114 | |
| Descripción | High Feature 192kHz 24-bit Digital Audio Interface Transceiver | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AK4114 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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ASAHI KASEI
[AK4114]
AK4114
High Feature 192kHz 24bit Digital Audio Interface Transceiver
GENERAL DESCRIPTION
The AK4114 is a digital audio transceiver supporting 192kHz, 24bits. The channel status decoder
supports both consumer and professional modes. The AK4114 can automatically detect a Non-PCM bit
stream. When combined with the multi channel codec (AK4527B or AK4529), the two chips provide a
system solution for AC-3 applications. The dedicated pins or a serial µP I/F can control the mode setting.
The small package, 48pin LQFP saves the system space.
*AC-3 is a trademark of Dolby Laboratories.
FEATURES
AES3, IEC60958, S/PDIF, EIAJ CP1201 Compatible
Low jitter Analog PLL
PLL Lock Range : 32kHz to 192kHz
Clock Source: PLL or X'tal
8-channel Receiver input
2-channel Transmission output (Through output or DIT)
Auxiliary digital input
De-emphasis for 32kHz, 44.1kHz, 48kHz and 96kHz
Detection Functions
• Non-PCM Bit Stream Detection
• DTS-CD Bit Stream Detection
• Sampling Frequency Detection
(32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz)
• Unlock & Parity Error Detection
• Validity Flag Detection
Up to 24bit Audio Data Format
Audio I/F: Master or Slave Mode
40-bit Channel Status Buffer
Burst Preamble bit Pc and Pd Buffer for Non-PCM bit stream
Q-subcode Buffer for CD bit stream
Serial µP I/F
Two Master Clock Outputs: 64fs/128fs/256fs/512fs
Operating Voltage: 2.7 to 3.6V with 5V tolerance
Small Package: 48pin LQFP
Ta: -10 to 70°C
MS0098-E-04
-1-
2004/03
1 page  
ASAHI KASEI
PIN/FUNCTION (Continued)
No. Pin Name
I/O
Function
31 PDN
I
Power-Down Mode Pin
When “L”, the AK4114 is powered-down and reset.
CM0
I Master Clock Operation Mode 0 Pin in Parallel Mode
32 CDTO
O Control Data Output Pin in Serial Mode, IIC= “L”.
CAD1
I Chip Address 1 Pin in Serial Mode, IIC= “H”.
CM1
I Master Clock Operation Mode 1 Pin in Parallel Mode
33 CDTI
I Control Data Input Pin in Serial Mode, IIC= “L”.
SDA
I/O Control Data Pin in Serial Mode, IIC= “H”.
OCKS1
I Output Clock Select 1 Pin in Parallel Mode
34 CCLK
I Control Data Clock Pin in Serial Mode, IIC= “L”
SCL I Control Data Clock Pin in Serial Mode, IIC= “H”
OCKS0
I Output Clock Select 0 Pin in Parallel Mode
35 CSN
I Chip Select Pin in Serial Mode, IIC=”L”.
CAD0
I Chip Address 0 Pin in Serial Mode, IIC= “H”.
36 INT0
O Interrupt 0 Pin
37 INT1
O Interrupt 1 Pin
38 AVDD
I Analog Power Supply Pin, 3.3V
39 R
-
External Resistor Pin
18kΩ +/-1% resistor should be connected to AVSS externally.
40 VCOM
-
Common Voltage Output Pin
0.47µF capacitor should be connected to AVSS externally.
41 AVSS
I Analog Ground Pin
42 RX0
I
Receiver Channel 0 Pin (Internal biased pin)
This channel is default in serial mode.
43 NC(AVSS)
I
No Connect
No internal bonding. This pin should be connected to AVSS.
44 RX1
I Receiver Channel 1 Pin (Internal biased pin)
45 TEST1
I
TEST 1 pin.
This pin should be connected to AVSS.
46 RX2
I Receiver Channel 2 Pin (Internal biased pin)
47 NC(AVSS)
I
No Connect
No internal bonding. This pin should be connected to AVSS.
48 RX3
I Receiver Channel 3 Pin (Internal biased pin)
Note 1. All input pins except internal biased pins should not be left floating.
[AK4114]
MS0098-E-04
-5-
2004/03
5 Page 
ASAHI KASEI
CSN
CCLK
[AK4114]
tCSW
tCSH
VIH
VIL
VIH
VIL
CDTI
D3
D2
D1 D0
CDTO
Hi-Z
Figure 5. WRITE Data Input Timing in 4-wire serial mode
CSN
CCLK
VIH
VIL
VIH
VIL
VIH
VIL
CDTI
A1
A0
CDTO
Hi-Z
tDCD
D7
VIH
VIL
D6 D5 50%DVDD
Figure 6. READ Data Output Timing 1 in 4-wire serial mode
tCSW
CSN
CCLK
tCSH
VIH
VIL
VIH
VIL
CDTI
VIH
VIL
tCCZ
CDTO D3
D2
D1
D0
50%DVDD
Figure 7. READ Data Input Timing 2 in 4-wire serial mode
MS0098-E-04
- 11 -
2004/03
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK4114.PDF ] | |
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