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PDF AT91RM3400 Data sheet ( Hoja de datos )

Número de pieza AT91RM3400
Descripción ARM7TDMI based Microcontroller
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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No Preview Available ! AT91RM3400 Hoja de datos, Descripción, Manual

Features
Incorporates the ARM7TDMI™ ARM® Thumb® Processor
– Embedded ICE In-circuit Emulation, Debug Communication Channel Support
96K Bytes of Internal High-speed SRAM
256K Bytes of Internal High-speed ROM Integrating Default Boot Program
– Downloads Application from External Storage Medium in Internal SRAM
Memory Controller (MC)
– Memory Protection Unit, Abort Status and Misalignment Detection
Clock Generator and Power Management Controller (PMC)
– 3 to 20 MHz and 32 kHz On-chip Oscillators with Two PLLs
– Programmable Software Power Optimization Capabilities
– Four Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
– Thirty Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Seven External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
Two 32-bit Parallel Input/Output Controllers (PIO) PIOA and PIOB
– Sixty-three Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain and Synchronous Output
System Timer (ST) Including a 16-bit Counter, Watchdog and Second Counter
Real Time Clock (RTC) with Alarm Interrupt
Debug Unit (DBGU), 2-wire USART and Support for Debug Communication Channel
– Programmable ICE Access Prevention
Twenty Peripheral Data Controller (PDC) Channels
USB 2.0 Full-speed (12 Mbits per second) Device Port (UDP)
– On-chip Transceiver
– 2-Kbyte Configurable FIFO for Loading and Storing Messages
Multimedia Card Interface (MCI)
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC
– MMC and SDCard Compliant, Support for up to two SDCards
Three Synchronous Serial Controllers (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator
– Support for ISO7816 T0/T1 Smart Card, Hardware and Software Handshaking,
RS485 Support
– Modem Control Lines on USART 1, IrDA Infrared Modulation/Demodulation
Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length
– Four External Peripheral Chip Selects
Two Three-channel 16-bit Timer/Counters (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
Two-wire Interface (TWI)
– Master Mode Support, All Two-wire Atmel EEPROMs Supported
IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
Required Power Supplies:
– 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL
– 1.65V to 3.6V on VDDIO
Fully Static Operation: 0 Hz to 66 MHz @2.7V/1.8V, up to 60 MIPS
Available in a 100-lead LQFP Package
ARM7TDMI-
based
Microcontroller
AT91RM3400
1790A–ATARM–11/03
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AT91RM3400 pdf
Advanced Interrupt
Controller
1790A–ATARM–11/03
AT91RM3400
– Handles Requests from the ARM7TDMI and the Peripheral Data Controller
• Address Decoder Provides Selection Signals for
– Up to Four Internal 1-Mbyte Memory Areas
– One 256-Mbyte Embedded Peripheral Area
• Abort Status Registers
– Source, Type and All Parameters of the Access Leading to an Abort are
Saved
– Facilitates Debug by Detection of Bad Pointers
• Misalignment Detector
– Alignment Checking of All Data Accesses
– Abort Generation in Case of Misalignment
• Remap Command
– Allows Remapping of an Internal SRAM in Place of the Internal ROM
– Allows Handling of Dynamic Interrupt Vectors
• 16-area Memory Protection Unit
– Individually Programmable Size Between 1K Bytes and 64M Bytes
– Individually Programmable Protection Against Write and/or User Access
– Peripheral Protection Against Write and/or User Access
• Controls the Interrupt Lines (nIRQ and nFIQ) of an ARM® Processor
• Thirty-two Individually Maskable and Vectored Interrupt Sources
– Source 0 is Reserved for the Fast Interrupt Input (FIQ)
– Source 1 is Reserved for System Peripherals (e.g., ST, RTC, PMC, DBGU)
– Source 2 to Source 31 Control up to Thirty Embedded Peripheral Interrupts
or External Interrupts
– Programmable Edge-triggered or Level-sensitive Internal Sources
– Programmable Positive/Negative Edge-triggered or High/Low Level-sensitive
External Sources
• 8-level Priority Controller
– Drives the Normal Interrupt of the Processor
– Handles Priority of the Interrupt Sources 1 to 31
– Higher Priority Interrupts Can Be Served During Service of Lower Priority
Interrupt
• Vectoring
– Optimizes Interrupt Service Routine Branch and Execution
– One 32-bit Vector Register per Interrupt Source
– Interrupt Vector Register Reads the Corresponding Current Interrupt Vector
• Protect Mode
– Easy Debugging by Preventing Automatic Operations when Protect ModeIs
Are Enabled
• Fast Forcing
– Permits Redirecting any Normal Interrupt Source on the Fast Interrupt of the
Processor
• General Interrupt Mask
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AT91RM3400 arduino
AT91RM3400
AT91RM3400 Product Properties
Power Supplies
The AT91RM3400 has four types of power supply pins:
• VDDCORE pins power the chip core and must be between 1.65V and 1.95V, 1.8V
nominal.
• VDDIO pins power the I/O lines and must be between 1.65V and 3.6V, 1.8V, 3V or 3.3V
nominal.
• VDDPLL pin powers the PLL cells and must be between 1.65V and 1.95V, 1.8V nominal.
• VDDOSC pin powers both oscillators and must be between 1.65V and 1.95V, 1.8V
nominal.
Ground pins are common for all power supplies except the VDDPLL and VDDOSC, for which
the GNDPLL and the GNDOSC pins are provided, respectively.
Powering VDDIO with a voltage lower than 3V prevents any use of the USB Device Port.
Pinout
The AT91RM3400 is available in a 100-lead LQFP package.
Table 1. AT91RM3400 Pinout in 100-lead LQFP Package
1 VDDCORE
26 PA11
2 GND
27 PA12
3 VDDPLL
28 PA13
4 PLLRCB
29 VDDIO
5 GNDPLL
30 GND
6 XOUT
31 PA14
7 XIN
32 PA15
8 VDDOSC
33 PA16
9 GNDOSC
34 PA17
10 XOUT32
35 VDDCORE
11 XIN32
36 GND
12 VDDPLL
37 PA18
13 PLLRCA
38 PA19
14 GNDPLL
39 PA20
15 PA0
40 PA21
16 PA1
41 PA22
17 PA2
42 PA23
18 PA3
43 PA24
19 PA4
44 PA25
20 PA5
45 PA26
21 PA6
46 PA27
22 PA7
47 PA28
23 PA8
48 VDDIO
24 PA9
49 GND
25 PA10
50 PA29
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
PA30
PA31
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
VDDIO
GND
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
PB21
PB22
JTAGSEL
TDI
TDO
TCK
TMS
VDDIO
GND
TST
NRST
VDDCORE
GND
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
DDM
DDP
VDDIO
GND
1790A–ATARM–11/03
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