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PDF BUK553-48C Data sheet ( Hoja de datos )

Número de pieza BUK553-48C
Descripción PowerMOS transistor Voltage clamped logic level FET
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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Philips Semiconductors
PowerMOS transistor
Voltage clamped logic level FET
Product specification
BUK553-48C
GENERAL DESCRIPTION
Protected N-channel enhancement
mode logic level field-effect power
transistor in a plastic envelope.
The device is intended for use in
automotive applications. It has
built-in zener diodes providing active
drain voltage clamping.
PINNING - TO220AB
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
QUICK REFERENCE DATA
SYMBOL PARAMETER
V(CL)DSR
ID
Ptot
Tj
WDSRR
RDS(ON)
Drain-source clamp voltage
Drain current (DC)
Total power dissipation
Junction temperature
Repetitive clamped turn off
energy; Tj = 150˚C
Drain-source on-state
resistance; VGS = 5 V
MIN. TYP. MAX. UNIT
40 48 58 V
21 A
75 W
175 ˚C
50 mJ
85 m
PIN CONFIGURATION
SYMBOL
d
tab
1 23
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDS
VDG
±VGS
ID
ID
IDM
Ptot
Tstg
Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak
value)
Total power dissipation
Storage temperature
Junction Temperature
continuous
continuous
-
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
-
THERMAL RESISTANCES
SYMBOL PARAMETER
Rth j-mb
Rth j-a
Thermal resistance junction to
heatsink
Thermal resistance junction to
ambient
CONDITIONS
with heatsink compound
MIN.
-
-
-
-
-
-
-
- 55
- 55
MAX.
30
30
15
21
15
84
75
175
175
UNIT
V
V
V
A
A
A
W
˚C
˚C
MIN. TYP. MAX. UNIT
- - 2 K/W
- 60 - K/W
August 1994
1
Rev 1.000

1 page




BUK553-48C pdf
Philips Semiconductors
PowerMOS transistor
Voltage clamped logic level FET
Product specification
BUK553-48C
a
2.0
Normalised RDS(ON) = f(Tj)
1.5
1.0
0.5
0
-60
-20
20 60 100 140 180
Tj / C
Fig.11. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 10 A; VGS = 5 V
ID / A
1E-01
SUB-THRESHOLD CONDUCTION
1E-02
1E-03
2 % typ 98 %
1E-04
1E-05
1E-06
0 0.4 0.8 1.2 1.6 2 2.4
VGS / V
Fig.12. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
C / pF
2000
1000
500
BUK5Y3-48C
Ciss
200 Coss
100
Crss
50
0.01
0.1 1
VDS / V
10 100
Fig.13. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
VGS(TO) / V
2
1
max.
typ.
min.
0
-60 -20 20 60 100 140 180
Tj / C
Fig.14. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
IS / A
40
Tmb / degC =
150
30 25
-55
20
BUK5Y3-48C
10
0
0 0.5 1 1.5
VSDS / V
Fig.15. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
VGS / V
7
6
VDD / V = 12
BUK5Y3-48C
30
5
4
3
2
1
0
0 5 10 15 20
QG / nC
Fig.16. Typical turn-on gate-charge characteristics.
VGS = f(QG); conditions: ID = 10 A; parameter VDS
August 1994
5
Rev 1.000

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