PDF MC13111A Data sheet ( Hoja de datos )

Número de pieza	MC13111A
Descripción	UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT
Fabricantes	Motorola Semiconductors
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No Preview Available ! Order this document by MC13110A/D Advance Information MC13110A/B MC13111A/B Universal Cordless Telephone Subsystem IC The MC13110A/B and MC13111A/B integrates several of the functions required for a cordless telephone into a single integrated circuit. This significantly reduces component count, board space requirements, external adjustments, and lowers overall costs. It is designed for use in both the handset and the base. • MC13110A and MC13111A: Fully Programmable in all Power Modes • MC13110B and MC13111B: MPU Clk Out and Second Local Oscillator are “Always On”. There is No Inactive Mode • Dual Conversion FM Receiver – Complete Dual Conversion Receiver – Antenna Input to Audio Out 80 MHz Maximum Carrier Frequency – RSSI Output – Carrier Detect Output with Programmable Threshold – Comparator for Data Recovery – Operates with Either a Quad Coil or Ceramic Discriminator • Compander – Expander Includes Mute, Digital Volume Control, Speaker Driver, Programmable Low Pass Filter, and Gain Block – Compressor Includes Mute, Programmable Low Pass Filter, Limiter, and Gain Block • MC13110A/B only: Frequency Inversion Scrambler – Function Controlled via MPU Interface – Programmable Carrier Modulation Frequency • Dual Universal Programmable PLL – Supports New 25 Channel U.S. Standard with No External Switches – Universal Design for Domestic and Foreign Cordless Telephone Standards – Digitally Controlled Via a Serial Interface Port – Receive Side Includes 1st LO VCO, Phase Detector, and 14–Bit Programmable Counter and 2nd LO with 12–Bit Counter – Transmit Section Contains Phase Detector and 14–Bit Counter – MPU Clock Outputs Eliminates Need for MPU Crystal • Low Battery Detect – Provides Two Levels of Monitoring with Separate Outputs – Separate, Adjustable Trip Points • 2.7 to 5.5 V Operation (15 µA Current Consumption in Inactive Mode) • AN1575: Refer to this Application Note for a List of the “Worldwide Cordless Telephone Frequencies Simplified Block Diagram UNIVERSAL NARROWBAND FM RECEIVER INTEGRATED CIRCUIT 52 1 FB SUFFIX PLASTIC PACKAGE CASE 848B (QFP–52) 48 1 FTA SUFFIX PLASTIC PACKAGE CASE 932 (LQFP–48) ORDERING INFORMATION Device Tested Operating Temperature Range Package MC13110AFB QFP–52 MC13110AFTA LQFP–48 MC13110BFB QFP–52 MC13110BFTA LQFP–48 TA = – 40° to +85°C MC13111AFB QFP–52 MC13111AFTA LQFP–48 MC13111BFB QFP–52 MC13111BFTA LQFP–48 Rx In Rx PD In Rx PD Out Tx PD Out 1st Mixer 1st LO Rx Phase Detector Tx Phase Detector 2nd Mixer 2nd LO Limiting IF Amplifier RSSI 2nd LO Detector Scrambler µP Serial Interface Expander Low Battery Detect NOTE: = MC13110A/B Only Tx Out Scrambler Compressor This device contains 8262 active transistors. This document contains information on a new product. Specifications and information herein arMe OsuTbjOecRt tOo cLhAangAeNwAithLoOut GnotIiCce.DEVICE DATA © Motorola, Inc. 1997 MPU Clock Out RSSI Carrier Detect Out Data Out Low Battery Indicator Rx Out SPI Tx In Rev 0 1 1 page MC13110A/B MC13111A/B ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.6 V, VB = 1.5 V, TA = 25°C, Active or Rx Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic Figure Input Pin Measure Pin Symbol Min Typ Max Unit SECOND MIXER (No Modulation, fin = 10.7 MHz, 50 Ω Termination at Inputs) Input Impedance 24 Mix2 In Mix2 In RP2 In – 2.8 – kΩ CP2 In – 3.6 – pF Output Impedance 24 – Mix2 Out RP2 Out – 1.5 – kΩ CP2 Out – 6.1 – pF Voltage Conversion Gain (Vin = 1.0 mVrms, with CF2 Filter as Load) 26, 27 Mix2 In Mix2 Out MXgain2 – 20 – dB 1.0 dB Voltage Compression Level (Input Referred) Mix2 In Mix2 Out VO mVrms IP3 Bit Set 0 28, 30 Mix2 – 32 – dBm 1 dB – –17 – IP3 Bit Set 1 29, 30 – 45 – – –14 – Third Order Intercept (Input Referred) [Note 6] Mix2 In Mix2 Out TOImix2 mVrms IP3 Bit Set 0 28, 30 – 136 – dBm – –4.3 – IP3 Bit Set 1 29, 30 – 158 – – –3.0 – –3.0 dB IF Bandwidth 31 Mix2 In Mix2 Out LIMITER/DEMODULATOR (fin = 455 kHz, fdev = ±3.0 kHz, fmod = 1.0 kHz) Input Impedance 49 Lim In Lim In Detector Output Impedance IF –ā3.0 dB Limiting Sensitivity Demodulator Bandwidth – – Det Out 1 Lim In Det Out – Lim In Det Out Mix2 BW RPLim CPLim RO IF Sens BW – – – – – – 2.5 – MHz 1.5 – kΩ 16 – pF 1.1 – kΩ 71 100 µVrms 20 – kHz RSSI/CARRIER DETECT (No Modulation) RSSI Output Dynamic Range DC Voltage Range 56 Mix1 In RSSI RSSI – 80 – dB 56 Mix1 In RSSI DC RSSI – 0.2 to – Vdc 1.5 Carrier Detect Threshold CD Threshold Adjust = (10100) (Threshold Relative to Mix1 In Level) Hysteresis, CD = (10100) (Threshold Relative to Mix1 In Level) Output High Voltage CD = (00000), RSSI = 0.2 V 57 Mix1 In CD Out VT – 15 57 Mix1 In CD Out Hys – 2.0 1 RSSI CD Out VOH VCC – 3.6 0.1 – µVrms – dB –V Output Low Voltage CD = (11111), RSSI = 0.9 V 1 RSSI CD Out VOL – 0.02 0.4 V Carrier Detect Threshold Adjustment Range 126 – (Programmable through MPU Interface) – VT – –20 to – dB Range 11 Carrier Detect Threshold – Number of Programmable Levels 126 – – VTn – 32 – – NOTE: 6. Third order intercept calculated for input levels 10 dB below 1.0 dB compression point. MOTOROLA ANALOG IC DEVICE DATA 5 5 Page MC13110A/B MC13111A/B ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁPin ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁLQFP–48 QFP–52 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ48 1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ1 2 Symbol/ Type LO2 In LO2 Out PIN FUNCTION DESCRIPTION Equivalent Internal Circuit (52 Pin QFP) PLL Vref 1 100 LO2 In PLL PLL Vref Vref 100 2 LO2 Out Description These pins form the PLL reference oscillator when connected to an external parallel–resonant crystal (10.24 MHz typical). The reference oscillator is also the second Local Oscillator (LO2) for the RF receiver. “LO2 In” may also serve as an input for an externally generated reference signal which is typically ac–coupled. When the IC is set to the inactive mode, LO2 In is internally pulled low to disable the oscillator. The input capacitance to ground at each pin (LO2 In/ LO2 Out) is 3.0 pF. ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ2 3 Vag ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ3 4 RxPD (Output) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ5 6 TxPD ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ(Output) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ4 5 PLLVref VCC Audio PLL Vref 3 30 k Vag PLL Vref PLL Vref 15 4, 6 Rx PD, Tx PD VCC Audio 5 PLL Vref 132 k Vag is the internal reference voltage for the switched capacitor filter section. This pin must be decoupled with a 0.1 µF capacitor. This pin is a tri–state voltage output of the Rx and Tx Phase Detector. It is either “high”, “low”, or “high impedance,” depending on the phase difference of the phase detector input signals. During lock, very narrow pulses with a frequency equal to the reference frequency are present. This pin drives the external Rx and Tx PLL loop filters. Rx and Tx PD outputs can sink or source 1.0 mA. PLL Vref is a PLL voltage regulator output pin. An internal voltage regulator provides a stable power supply voltage for the Rx and Tx PLL’s and can also be used as a regulated supply voltage for other IC’s. It can source up to 1.0 mA externally. Proper supply filtering is a must on this pin. PLL Vref is pulled up to VCC audio for the standby and inactive modes (Note 1). ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ6 7 GndPLL ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ7 8 TxVCO ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ(Input) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁPLL ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁVref ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ8 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁTXVCO 1.0 k PLL Vref Ground pin for digital PLL section of IC. Tx VCO is the transmit divide counter input which is driven by an ac–coupled external transmit loop VCO. The minimum signal level is 200 mVpp @ 60.0 MHz. This pin also functions as the test mode input for the counter tests. MOTOROLA ANALOG IC DEVICE DATA 11 11 Page

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