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Número de pieza | PG12864LRF-ANN-B-S0 | |
Descripción | LCD Module | |
Fabricantes | POWERTIP | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de PG12864LRF-ANN-B-S0 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
No Preview Available ! POWERTIP TECH. CORP.
DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN
Specification For Approval
Customer
:
Model Type
: LCD Module
Sample Code
: PG12864LRF-ANN-B-S0
Mass Production Code :
Edition
:0
Customer Sign Sales Sign
Approved By
Prepared By
PT-R-003-3
1 page NO.PG12864LRF-ANN-B Rev:0
Note 1: Definition of angles θ and ∅
Note 2: Definition of viewing angles θ1 and θ2
Light (when reflected) z (θ=0°)
Y’(∅=180°)
θ
X’
Sensor
Cmax.
LCD panel
X(∅=90°)
Contrast
C
2.0
Z’
Light (when transmitted )
∅
Y(∅=0°)
(θ=90°)
Note :
θ1 θ2
viewing angle θ (∅ fixed)
Optimum viewing angle with the
naked eye and viewing angle θ at
Cmax. Above are not always the same
Note 3: Definition of contrast C
Brightness (reflection) of unselected dot (B2)
C =
Brightness (reflection) of selected dot (B1)
Note 4: Definition of response time
(%)
Brightness
(reflection)
Brightness (reflection) of
selected dot
Brightness
(reflection) of
B2 unselected dot
B1
0
Measured with a transmissive LCD
operating voltage (v)
Note:
panel which is displayed 1 cm2
VOPR : Operating voltage
tr : Response time (rise)
fFRM : Frame frequency
tf : Response time (fall)
POWERTIP TECHNOLOGY CORPORATION
DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN
4
5 Page NO.PG12864LRF-ANN-B Rev:0
Display Start Line
R/W D/I DB7………………………………… .DB0
Code
0 0 1 1 AAA A A A
MSB
LSB
Z address AAAAAA (binary) of the display data RAM is set in the display start line register and
displayed at the top of the screen. Figure 1 shows examples of display (1/64 duty cycle) when the start
line=0-3. When the display duty cycle is 1/64 or more (ex. 1/32, 1/24 etc.), the data of total line number
of LCD screen, from the line specified by display start line instruction, is displayed.
See figure 1.
Set page (X address)
Code
R/W D/I DB7………………………………….DB0
0 0 1 0 111 AAA
MSB
LSB
X address AAA (binary) of the display data RAM is set in the X address register. After that, writing or
reading to or from MPU is executed in this specified page until the next page is set. See figure 2.
Set Y Address
Code
R/W D/I DB7………………………………….DB0
0 0 0 1 AAA A A A
MSB
LSB
Y address AAAAAA (binary) of the display data RAM is set in the Y address Counter. After that,
Y address counter is increased by 1 every time the data is written or read to or from MPU.
Status Read
Code
R/W D/I DB7………………………………
1 0 BUSY 0 ON/OFF REST 0
MSB
.DB0
00 0
LS
• Busy
When busy is 1, the LSI is executing internal operations. No instructions are accepted while busy is 1, so
you should make sure that busy is 0 before writing the next instruction.
POWERTIP TECHNOLOGY CORPORATION
DISPLAY DEVICES FOR BETTER ELECTRONIC DESIGN
10
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet PG12864LRF-ANN-B-S0.PDF ] |
Número de pieza | Descripción | Fabricantes |
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