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PDF SI7617DN Data sheet ( Hoja de datos )

Número de pieza SI7617DN
Descripción MOSFET ( Transistor )
Fabricantes Vishay 
Logotipo Vishay Logotipo



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No Preview Available ! SI7617DN Hoja de datos, Descripción, Manual

New Product
P-Channel 30-V (D-S) MOSFET
Si7617DN
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
- 30 0.0123 at VGS = - 10 V
0.0222 at VGS = - 4.5 V
ID (A)d, g
- 35
- 35
PowerPAK® 1212-8
Qg (Typ.)
20.5 nC
3.30 mm
S
1S
3.30 mm
2
S
3G
4
D
8D
7
D
6
D
5
Bottom View
Ordering Information: Si7617DN-T1-GE3 (Lead (Pb)-free and Halogen-free)
FEATURES
Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• 100% Rg Tested
• 100% UIS Tested
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
S
• Notebook Battery Charging
• Notebook Adapter Switch
G
D
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
Gate-Source Voltage
VDS
VGS
Continuous Drain Current (TJ = 150 °C)
Pulsed Drain Current
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
ID
IDM
Continuous Source-Drain Diode Current
Avalanche Current
Single-Pulse Avalanche Energy
TC = 25 °C
TA = 25 °C
L = 0.1 mH
IS
IAS
EAS
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)e, f
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
PD
TJ, Tstg
Limit
- 30
± 25
- 35d
- 35d
- 13.9a, b
- 11.1a, b
- 60
- 35d
- 3.0a, b
- 29
42
52
33
3.7a, b
2.4a, b
- 55 to 150
260
Unit
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambienta, c
Maximum Junction-to-Case
t 10 s
Steady State
Symbol
RthJA
RthJC
Typical
26
1.9
Maximum
33
2.4
Unit
°C/W
Notes:
a. Surface mounted on 1" x 1" FR4 board.
b. t = 10 s.
c. Maximum under Steady State conditions is 81 °C/W.
d. Package limited.
e. See Solder Profile (www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed cop-
per (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is
not required to ensure adequate bottom side solder interconnection.
f. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
g. Based on TC = 25 °C.
Document Number: 65164
S09-1495-Rev. A, 10-Aug-09
www.vishay.com
1

1 page




SI7617DN pdf
New Product
MOSFET TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
60
Si7617DN
Vishay Siliconix
45
Package Limited
30
15
0
0 25 50 75 100 125 150
TC - Case Temperature (°C)
Current Derating*
75 2.0
60
1.5
45
1.0
30
0.5
15
0
0 25 50 75 100 125 150
TC - Case Temperature (°C)
Power Derating, Junction-to-Case
0.0
0
25 50 75 100 125 150
TA - Ambient Temperature (°C)
Power Derating, Junction-to-Ambient
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 65164
S09-1495-Rev. A, 10-Aug-09
www.vishay.com
5

5 Page





SI7617DN arduino
AN822
Vishay Siliconix
105
Spreading Copper (sq. in.)
95
85
75
65
55
0%
45
100 %
50 %
0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
Figure 5. Spreading Copper - Si7401DN
130
120 Spreading Copper (sq. in.)
110
100
90
80
50 %
100 %
70
60 0 %
50
0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
Figure 6. Spreading Copper - Junction-to-Ambient Performance
CONCLUSIONS
As a derivative of the PowerPAK SO-8, the PowerPAK
1212-8 uses the same packaging technology and has
been shown to have the same level of thermal perfor-
mance while having a footprint that is more than 40 %
smaller than the standard TSSOP-8.
Recommended PowerPAK 1212-8 land patterns are
provided to aid in PC board layout for designs using this
new package.
The PowerPAK 1212-8 combines small size with attrac-
tive thermal characteristics. By minimizing the thermal
rise above the board temperature, PowerPAK simplifies
thermal design considerations, allows the device to run
cooler, keeps rDS(ON) low, and permits the device to
handle more current than a same- or larger-size MOS-
FET die in the standard TSSOP-8 or SO-8 packages.
www.vishay.com
4
Document Number 71681
03-Mar-06

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