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PDF Si5411EDU Data sheet ( Hoja de datos )
| Número de pieza | Si5411EDU | |
| Descripción | P-Channel 12V (D-S) MOSFET | |
| Fabricantes | Vishay | |
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www.vishay.com
Si5411EDU
Vishay Siliconix
P-Channel 12 V (D-S) MOSFET
PRODUCT SUMMARY
VDS (V)
- 12
RDS(on) () (Max.)
0.0082 at VGS = - 4.5 V
0.0094 at VGS = - 3.7 V
0.0117 at VGS = - 2.5 V
0.0206 at VGS = - 1.8 V
ID (A)
- 25a
- 25a
- 25a
- 15
PowerPAK ChipFET Single
Qg (Typ.)
43 nC
FEATURES
• TrenchFET® Power MOSFET
• Thermally Enhanced PowerPAK® ChipFET Package
- Small Footprint Area
- Low On-Resistance
• 100 % Rg and UIS Tested
• Typical ESD Protection: 5000 V (HBM)
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
1
2
D3
DD
4
8D
7D
6S
5
D
G
S
1.9 mm
APPLICATIONS
• Portable Devices such as Smart Phones,
Tablet PCs and Mobile Computing
- Battery Switch
- Load Switch
- Power Management
G
Marking Code
S
Bottom View
Ordering Information:
Si5411EDU-T1-GE3 (Lead (Pb)-free and Halogen-free)
LB XXX
Lot Traceability
and Date Code
Part # Code
D
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (TJ = 150 °C)
Pulsed Drain Current (t = 100 μs)
Continuous Source-Drain Diode Current
Single Avalanche Current
Single Avalanche Energy
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)d, e
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
TC = 25 °C
TA = 25 °C
L = 0.1 mH
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
VDS
VGS
ID
IDM
IS
IAS
EAS
PD
TJ, Tstg
- 12
±8
- 25a
- 25a
- 16.5b, c
- 13b, c
- 140
- 25a
- 2.6b, c
- 15
11
31
20
3.1b, c
2b, c
- 50 to 150
260
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambientb, f
Maximum Junction-to-Case (Drain)
t5s
Steady State
RthJA
RthJC
34
3
40
°C/W
4
Notes
a. Package limited.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 5 s.
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection.
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under steady state conditions is 90 °C/W.
S13-1662-Rev. A, 29-Jul-13
1
Document Number: 62879
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
1 page  
www.vishay.com
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Si5411EDU
Vishay Siliconix
1000
100
Limited by RDS(on)*
100 µs
10
1
0.1 TA = 25 °C
1 ms
10 ms
100 ms
10 s
1s
DC
0.01
0.1
BVDSS Limited
1 10 100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
60
50
40
30
Package Limited
20
35
30
25
20
15
10
10 5
0
0 25 50 75 100 125 150
TC - Case Temperature (°C)
0
25 50 75 100 125 150
TC - Case Temperature (°C)
Current Derating*
Power Derating
* The power dissipation PD is based on TJ(max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit.
S13-1662-Rev. A, 29-Jul-13
5
Document Number: 62879
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet Si5411EDU.PDF ] | |
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