PDF CY8C21312 Data sheet ( Hoja de datos )

Número de pieza	CY8C21312
Descripción	Automotive Extended Programmable System-on-Chip
Fabricantes	Cypress Semiconductor
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CY8C21312 CY8C21512 Automotive Extended PSoC® Programmable System-on-Chip™ Automotive Extended PSoC® Programmable System-on-Chip™ Features ■ Automotive Electronics Council (AEC) Q100 qualified ■ Powerful Harvard-architecture processor ❐ M8C processor speeds up to 12 MHz ❐ Low power at high speed ❐ Operating voltage: 4.75 V to 5.25 V or 3 V to 3.6 V ❐ Automotive temperature range: –40 °C to +125 °C ■ Advanced peripherals ❐ One CapSense® block: • Provides configurable capacitive sensing elements • Supports combination of CapSense buttons, sliders, touchpads, and proximity sensors ❐ One limited digital PSoC® block provides: • 8-bit timer, counter, or pulse-width modulator (PWM) • Half-duplex UART • SPI slave • Connectable to all general purpose I/O (GPIO) pins ■ Flexible on-chip memory ❐ 8 KB flash program storage ❐ 512 bytes SRAM data storage ❐ In-system serial programming (ISSP) ❐ Partial flash updates ❐ Flexible protection modes ❐ EEPROM emulation in flash ■ Complete development tools ❐ Free development software (PSoC Designer™) ❐ Full-featured in-circuit emulator (ICE) and programmer ❐ Full-speed emulation ❐ Complex breakpoint structure ❐ 128 KB trace memory ■ Precision, programmable clocking ❐ Internal 24 MHz oscillator ❐ Internal low-speed, low-power oscillator for Watchdog and Sleep functionality ❐ Optional external oscillator, up to 24 MHz ■ Programmable pin configurations ❐ 25 mA sink, 10 mA drive on all GPIOs ❐ Pull-up, pull-down, high Z, strong, or open drain drive modes on all GPIOs ❐ Analog input on all GPIOs ❐ Configurable interrupt on all GPIOs ■ Versatile analog mux ❐ Common internal analog bus ❐ Simultaneous connection of I/O combinations ■ Additional system resources ❐ Inter-Integrated Circuit (I2C™) master, slave, or multi-master operation up to 400 kHz ❐ Watchdog and sleep timers ❐ User-configurable low-voltage detection (LVD) ❐ Integrated supervisory circuit ❐ On-chip precision voltage reference Logic Block Diagram PSoC CORE Port 3 Port 2 Port 1 Port 0 System Bus Global Digital Interconnect SRAM 512B Interrupt Controller Global Analog Interconnect SROM Flash 8K CPU Core (M8C) Sleep and Watchdog Multiple Clock Sources (Includes IMO, ILO, PLL, and ECO) DIGITAL SYSTEM Digital Block ANALOG SYSTEM Analog Input Muxing CapSense Block Digital Resources Analog Resources Digital Clocks POR and LVD I2C System Resets SYSTEM RESOURCES Internal Voltage Ref. Cypress Semiconductor Corporation • 198 Champion Court Document Number: 001-81890 Rev. B • San Jose, CA 95134-1709 • 408-943-2600 Revised January 29, 2014 1 page CY8C21312 CY8C21512 PSoC Device Characteristics Depending on your PSoC device characteristics, the digital and analog systems can have a varying number of digital and analog blocks. Table 1 lists the resources available for specific PSoC device groups. The PSoC device covered by this datasheet is highlighted in Table 1 Table 1. PSoC Device Characteristics PSoC Part Number CY8C29x66 [1] CY8C28xxx Digital I/O up to 64 up to 44 Digital Rows 4 up to 3 CY8C27x43 CY8C24x94 [1] CY8C24x23A [1] CY8C23x33 CY8C22x45 [1] CY8C21x45 [1] CY8C21x34 [1] CY8C21x23 CY8C21x12 [1] CY8C20x34 [1] CY8C20xx6 up to 44 up to 56 up to 24 up to 26 up to 38 up to 24 up to 28 up to 16 up to 24 up to 28 up to 36 2 1 1 1 2 1 1 1 1 0 0 Digital Blocks 16 up to 12 8 4 4 4 8 4 4 4 1 [2] 0 0 Analog Inputs up to 12 up to 44 up to 12 up to 48 up to 12 up to 12 up to 38 up to 24 28 up to 8 24 up to 28 up to 36 Analog Outputs 4 up to 4 4 2 2 2 0 0 0 0 0 0 0 Analog Columns 4 up to 6 4 2 2 2 4 4 2 2 0 0 0 Analog Blocks 12 up to 12 + 4 [2] 12 6 6 4 6 [2] 6 [2] 4 [2] 4 [2] 1 [2] 3 [2, 3] 3 [2, 3] SRAM Size Flash Size 2 K 32 K 1 K 16 K 256 1K 256 256 1K 512 512 256 512 512 up to 2 K 16 K 16 K 4K 8K 16 K 8K 8K 4K 8K 8K up to 32 K Getting Started For in-depth information, along with detailed programming details, see the PSoC® Technical Reference Manual. For up-to-date ordering, packaging, and electrical specification information, see the latest PSoC device datasheets on the web. Application Notes Cypress application notes are an excellent introduction to the wide variety of possible PSoC designs. Development Kits PSoC Development Kits are available online from and through a growing number of regional and global distributors, which include Arrow, Avnet, Digi-Key, Farnell, Future Electronics, and Newark. Training Free PSoC technical training (on demand, webinars, and workshops), which is available online via www.cypress.com, covers a wide variety of topics and skill levels to assist you in your designs. CYPros Consultants Certified PSoC consultants offer everything from technical assistance to completed PSoC designs. To contact or become a PSoC consultant go to the CYPros Consultants web site. Solutions Library Visit our growing library of solution focused designs. Here you can find various application designs that include firmware and hardware design files that enable you to complete your designs quickly. Technical Support Technical support – including a searchable Knowledge Base articles and technical forums – is also available online. If you cannot find an answer to your question, call our Technical Support hotline at 1-800-541-4736. Notes 1. Automotive qualified devices available in this group. 2. Limited analog functionality. 3. Two analog blocks and one CapSense® block. Document Number: 001-81890 Rev. B Page 5 of 38 5 Page CY8C21312 CY8C21512 Table 4. Register Map 0 Table: User Space Name Addr (0,Hex) Access Name PRT0DR 00 RW PRT0IE 01 RW PRT0GS 02 RW PRT0DM2 03 RW PRT1DR 04 RW PRT1IE 05 RW PRT1GS 06 RW PRT1DM2 07 RW PRT2DR 08 RW PRT2IE 09 RW PRT2GS 0A RW PRT2DM2 0B RW 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F CSCNT_DR0 20 # CSCNT_DR1 21 W AMUX_CFG CSCNT_DR2 22 RW CSCMP_CR0 CSCNT_CR0 23 # CSMOD0_DR0 24 # CSCMP_CR1 CSMOD0_DR1 25 W CSMOD0_DR2 26 RW CSCMP_CR2 CSMOD0_CR0 27 # CSMOD1_DR0 28 # CSMOD1_DR1 29 W CSREF_CR0 CSMOD1_DR2 2A RW CSMOD1_CR0 2B # LDB0_DR0 2C # TMP_DR0 LDB0_DR1 2D W TMP_DR1 LDB0_DR2 2E RW TMP_DR2 LDB0_CR0 2F # TMP_DR3 30 31 32 33 34 35 36 CSCMP_CR3 37 CSCMP_CR4 38 39 3A 3B 3C 3D 3E 3F Blank fields are Reserved and must not be accessed. Document Number: 001-81890 Rev. *B Addr (0,Hex) 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F Access RW RW # RW # RW RW RW RW RW RW Name Addr (0,Hex) 80 81 82 83 CSREF_CR1 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF RDI0RI B0 RDI0SYN B1 RDI0IS B2 RDI0LT0 B3 RDI0LT1 B4 RDI0RO0 B5 RDI0RO1 B6 B7 B8 B9 BA BB BC BD BE BF # Access is bit specific. Access Name RW CUR_PP STK_PP IDX_PP MVR_PP MVW_PP I2C_CFG I2C_SCR I2C_DR I2C_MSCR INT_CLR0 INT_CLR1 INT_CLR3 INT_MSK3 INT_MSK0 INT_MSK1 INT_VC RES_WDT CSCMP_CR5 CSCMP_CR6 RW RW RW RW RW RW RW CPU_F CPU_SCR1 CPU_SCR0 Addr (0,Hex) C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF Access RW RW RW RW RW RW # RW # RW RW RW RW RW RW RC W RW RW RL # # Page 11 of 38 11 Page

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