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PDF NJU7512VT Data sheet ( Hoja de datos )
| Número de pieza | NJU7512VT | |
| Descripción | 1200 bps MSK Modem | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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NJU7512VT
1200 bps MSK Modem for Data Communication
GENERAL DESCRIPTION
The NJU7512 is a 1200bps MSK (Minimum Shift Keying)
modem IC, which operates from 1.8V power supply.
It includes 14.7456MHz oscillator and selectable OSC buffer
for an external output, and a frame detector for receiving.
MSK modem is especially used for low power data
communication, which requires high receiving sensitivity
and noise susceptibility characteristics.
PACKAGE OUTLINE
NJU7512VT
FEATURES
Low Operating Current
1.9mA (Modulation and Demodulation operation, VDD=1.8V)
Wide Operating Voltage range
1.8 to 5.5V
Baud Rate
1200 bps
Oscillating Frequency
14.7456 MHz
Selectable OSC Buffer Output
14.7456 MHz or 3.6864 MHz
Built-in Frame Detector
2 types of frame data or disable
Power Save Function
Power control for Modulator and Demodulator blocks respectively
Easy to use modem function
A few external parts required
Wide Operating Temperature range - 40 to +105 °C
CMOS Technology
Package Outline
SSOP20 6.5mm x 6.4mm, t=0.65mm
Please refer the IC Package information about the Package outline and Packing.
BLOCK DIAGRAM
AIN AGS
12
-- BPF
+
FRS 17
FRK 18
Detector
Limiter Amp.
Clock
Recocer
Frame
Detector
TD 15
TRD 16
MSK
Mod.
Sine
Wave
LPF
Standard Bias Analog
Voltage Voltage Ground
Internal Timing Clock
Timing
Generator
Standard Bias
19
10 20
11 7
MX
VSS VDD1
FSE XBO
5 RDT
4 RTM
3 PLLS
14 PDRX
13 PDTX
12 BR
8 XOUT
9 XIN
6 VDD2
Ver.2013-07-10
-1-
1 page  
DETAILS OF THE TERMINALS AND BLOCKS DESCRIPTION
NJU7512VT
Analog Signal
FRS
Fram e Pattern Select
FRK
Fram e Detector on-off
H/L
17
H/L
18
TD
MSK Modulation Data
TRD
MSK Modulation Data Read-
tim ing Output
15
16
MSK Demodulator
AIN
1
--
+
AGS
2
BPF
Limitter
Clock Frame
Detector Recocery Detector
5
4
MSK
Mod.
Modified
SineWave
Generator
LPF
Internal Timing Clock
Standard Bias Analog
V oltage V oltage Gr ound
H/L
3
H/L
14
13 H/L
Timing
Generator
12 H/-
XOUT
8
RDT
Dem odulated Data Output
RTM
Clock Output for Dem odulated
PLLS
Low /High-Phase Velocity
PDRX
Dem odulator Pow er On/Dow n
PDTX
Modulator Pow er On/Dow n
BR
Norm ally H:1200bps
MSK Modulator
19
Standard
Bias
10 20
VSS VDD1
11 7
H/L
9
XIN
6
VDD2
Oscillator
VDD
Oscillating Circuit Pow er Supply
XBO
Oscillating Frequency Output
MX
MSK Modulation Signal Output
VDD
FSE
Output Frequency Selection
[ MSK DEMODULATION CIRCUIT ]
● ANALOG RECEIVED SIGNAL INPUT
The analog signal is inputted which is changed to a logical high data from 1200Hz tone(1 cycle / bit, 833.3usec) and
to a logical low data from 1800Hz (1.5 cycles / bit, 833.3usec) tone. The maximum speed of digital data is 1200 bps.
A received analog signal can be identified with one of two kinds of 16-bit frame pattern signals (C4D6 or 9336).
When performing the frame signal detection, the FRK terminal (Pin 18) is set to logical high. The frame pattern to
distinguish is specified by setting FRS terminal (Pin 17) to a logical high or low.
The data composition of the input signal with a frame pattern serves as data for a preamble pattern + frame pattern +
received data. The demodulated data are outputted from a RDT terminal (Pin 5) without a preamble and frame data. If
the preamble pattern is less length than the recommended value, normal demodulation data may not be obtained.
Analog signal
Input
Preamble pattern
More than 12bit or 50bit
Frame pattern
C4D6H or 9336H
Received data
MSK Demodulation Data
Output
tRD RDT, RTM
MSK Demodulation data
The frame pattern can be disenabled with setting a logical low of FRK (Pin 18). If the frame pattern is disenabled, all
received data output from RDT (Pin 5), but the output from RDT (Pin 5) may have a lack of information at beginning of
the receiving.
Analog signal
Input
tRD
MSK Demodulation Data
Output
Ver.2013-07-10
Lost
Received data
RDT, RTM
MSK Demodulation Data
-5-
5 Page 
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
Supply Voltage
VDD
RATINGS
7.0
Power Dissipation
Input Voltage (Control)
Operating Temperature
PD
VIND
Topr
375
VSS - 0.5 to VDD1+0.5
- 40 to + 105
Storage Temperature
Tstg
- 40 to + 150
Note: Please refer to the test circuit about Supply Voltage (VDD).
NJU7512VT
(Ta=25°C)
UNIT
V
mW
V
°C
°C
RECOMMENDED OPERATIONAL CONDITION
PARAMETER
SYMBOL
Supply Voltage 1
VDD1
Supply Voltage 2
VDD2
MIN.
1.8
1.8
(Ta=25°C)
TYP. MAX. UNIT
- 5.5 V
-
VDD1
V
ELECTRICAL CHARACTERISTICS 1
(Ta = 25°C, VSS = 0V, Please refer to the test circuit, VDD=VDD1=VDD2=1.8V and R1 = 0Ω , unless otherwise noted)
[ DC CHARACTERISTICS ]
PARAMETER
SYMBOL
TEST CONDITIONS
MIN. TYP. MAX. UNIT
Current Consumption in
modulation and demodulation
I DD1 VDD=1.8V, No Signal
- 1.9 2.2 mA
Current Consumption in
power down
I DD2 VDD=1.8V, No Signal
- 0.01 10 uA
Current Consumption in only
modulation
I DD3 VDD=1.8V, No Signal
- 1.1 1.2 mA
Current Consumption in only
demodulation
I DD4 VDD=1.8V, No Signal
- 1.7 1.9 mA
Logical High Input Voltage
V IH
VDD=1.8V, No Signal *NOTE2
0.75 x
VDD
-
VDD
V
Logical Low Input Voltage
V IL VDD=1.8V, No Signal *NOTE2 VSS
-
0.25 x
VDD
V
Hysteresis Width of Digital
Logical Low Output Voltage
V HS VDD=1.8V, No Signal *NOTE2
-
V OL
VDD=1.8V, No Signal, Io=-1.6mA
*NOTE3
VSS
0.5
-
-
0.4
V
V
Ver.2013-07-10
- 11 -
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NJU7512VT.PDF ] | |
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