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PDF ADA4062-4 Data sheet ( Hoja de datos )

Número de pieza ADA4062-4
Descripción Low Power JFET-Input Op Amp
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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No Preview Available ! ADA4062-4 Hoja de datos, Descripción, Manual

FEATURES
Low input bias current: 50 pA maximum
Offset voltage
1.5 mV maximum for B grade (ADA4062-2 SOIC package)
2.5 mV maximum for A grade
Offset voltage drift: 5 μV/°C typical
Slew rate: 3.3 V/μs typical
CMRR: 90 dB typical
Low supply current: 165 μA typical
High input impedance
Unity-gain stable
±5 V to ±15 V dual-supply operation
Packaging
8-lead SOIC, 8-lead MSOP, 10-lead LFCSP, 14-lead TSSOP, and
16-lead LFCSP packages
APPLICATIONS
Power controls and monitoring
Active filters
Industrial/process controls
Body probe electronics
Data acquisition
Integrators
Input buffering
GENERAL DESCRIPTION
The ADA4062-2 and ADA4062-4 are dual and quad JFET-input
amplifiers with industry-leading performance. They offer lower
power, offset voltage, drift, and ultralow bias current. The
ADA4062-2 B grade (SOIC package) features a typical low offset
voltage of 0.5 mV, an offset drift of 5 μV/°C, and a bias current
of 2 pA.
The ADA4062 family is ideal for various applications, including
process controls, industrial and instrumentation equipment,
active filtering, data conversion, buffering, and power control
and monitoring. With a low supply current of 165 μA per
amplifier, they are well suited for lower power applications.
The ADA4062 family is also specified for the extended industrial
temperature range of −40°C to +125°C. The ADA4062-2 is
available in lead-free, 8-lead SOIC, 8-lead MSOP, and 10-lead
LFCSP (1.6 mm × 1.3 mm × 0.55 mm) packages, while the
ADA4062-4 is available in lead-free, 14-lead TSSOP and
16-lead LFCSP packages.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
Low Power JFET-Input Op Amps
ADA4062-2/ADA4062-4
PIN CONFIGURATIONS
OUT A 1
8 V+
–IN A 2 ADA4062-2 7 OUT B
+IN A 3
TOP VIEW
(Not to Scale)
6 –IN B
V– 4
5 +IN B
Figure 1. 8-Lead Narrow-Body SOIC and 8-Lead MSOP
–IN A 2
+IN A 3
ADA4062-2
TOP VIEW
(Not to Scale)
8 OUT B
7 –IN B
NC = NO CONNECT
Figure 2. 10-Lead LFCSP
OUT A 1
–IN A 2
+IN A 3
V+ 4
+IN B 5
–IN B 6
OUT B 7
14 OUT D
13 –IN D
ADA4062-4
TOP VIEW
(Not to Scale)
12 +IN D
11 V–
10 +IN C
9 –IN C
8 OUT C
Figure 3. 14-Lead TSSOP
–IN A 1
+IN A 2
V+ 3
+IN B 4
ADA4062-4
TOP VIEW
(Not to Scale)
12 –IN D
11 +IN D
10 V–
9 +IN C
NOTES
1. NC = NO CONNECT.
2. IT IS RECOMMENDED TO CONNECT THE EXPOSED PAD TO V–.
Figure 4. 16-Lead LFCSP
Table 1. Low Power Op Amps
Precision
CMOS
Precision
High Bandwidth
Single AD8663
AD8641
Dual AD8667 AD8642
Quad AD8669
AD8643
High
Bandwidth
AD8682
AD8684
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2010 Analog Devices, Inc. All rights reserved.

1 page




ADA4062-4 pdf
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Input Current
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
Rating
±18 V
±VSY
±VSY
±10 mA
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ADA4062-2/ADA4062-4
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. It was
measured using a standard 4-layer board.
Table 4. Thermal Resistance
Package Type
8-Lead SOIC
8-Lead MSOP
10-Lead LFCSP
14-Lead TSSOP
16-Lead LFCSP
θJA
120
142
132
112
75
θJC
45
45
46
35
12
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
POWER SEQUENCING
The supply voltages of the op amps must be established
simultaneously with, or before, any input signals are applied. If
this is not possible, the input current must be limited to 10 mA.
ESD CAUTION
Rev. B | Page 5 of 20

5 Page





ADA4062-4 arduino
RAVVCSIVLLNY=====11+400±1Vk05pVpF-p
TIME (4µs/DIV)
Figure 35. Large-Signal Transient Response
RAVVCSIVLLNY=====11+100±10k050pVmFV p-p
TIME (10µs/DIV)
Figure 36. Small-Signal Transient Response
4
2
INPUT
0
VSY = ±5V
AV = –10
OUTPUT
TIME (2µs/DIV)
Figure 37. Negative Overload Recovery
0
–2
–4
–6
ADA4062-2/ADA4062-4
VCRAVSIVLLNY=====11+200±10k01Vp5VFp-p
TIME (10µs/DIV)
Figure 38. Large-Signal Transient Response
VVCRASIVLLNY=====11+1±0010k010p5mVFV p-p
TIME (10µs/DIV)
Figure 39. Small-Signal Transient Response
4
2
0 INPUT
VSY = ±15V
AV = –10
OUTPUT
TIME (2µs/DIV)
Figure 40. Negative Overload Recovery
0
–5
–10
–15
–20
Rev. B | Page 11 of 20

11 Page







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